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nvk: Factor out build_push_write_push_const

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Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40639>
This commit is contained in:
Mel Henning 2026-01-07 17:32:32 -05:00 • committed by Marge Bot
parent 3b4b72f546
commit 7fc8fdbdaf
1 changed files with 17 additions and 9 deletions
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26
src/nouveau/vulkan/nvk_cmd_indirect.c
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@ -22,6 +22,7 @@
#include "nv_push_cl906f.h"
#include "nv_push_cla0c0.h"
#include "nv_push_clb1c0.h"
#include "nv_push_clc597.h"
#include "nv_push_clc6c0.h"
#include "nv_push_clc7c0.h"
#include "nv_push_clc86f.h"
@ -498,6 +499,19 @@ build_gfx_set_exec(nir_builder *b, struct nvk_nir_push *p, nir_def *token_addr,
}
}
static void
build_push_write_push_const(nir_builder *b, struct nvk_nir_push *p,
const VkPushConstantRange *pc_range)
{
assert(pc_range->offset % 4 == 0);
assert(pc_range->size % 4 == 0);
const uint32_t dw_count = pc_range->size / 4;
nvk_nir_P_1INC(b, p, NV9097, LOAD_CONSTANT_BUFFER_OFFSET, 1 + dw_count);
nvk_nir_push_dw(b, p, nir_imm_int(b,
nvk_root_descriptor_offset(push) + pc_range->offset));
}
static void
build_push_gfx_const(nir_builder *b, struct nvk_nir_push *p, nir_def *token_addr,
const VkIndirectCommandsPushConstantTokenEXT *token)
@ -507,13 +521,10 @@ build_push_gfx_const(nir_builder *b, struct nvk_nir_push *p, nir_def *token_addr
// TODO: Compute
assert(!(pc_range->stageFlags & VK_SHADER_STAGE_COMPUTE_BIT));
assert(pc_range->offset % 4 == 0);
assert(pc_range->size % 4 == 0);
const uint32_t dw_count = pc_range->size / 4;
nvk_nir_P_1INC(b, p, NV9097, LOAD_CONSTANT_BUFFER_OFFSET, 1 + dw_count);
nvk_nir_push_dw(b, p, nir_imm_int(b,
nvk_root_descriptor_offset(push) + pc_range->offset));
build_push_write_push_const(b, p, pc_range);
for (uint32_t i = 0; i < dw_count; i++)
nvk_nir_push_dw(b, p, load_global_dw(b, token_addr, i));
}
@ -527,12 +538,9 @@ build_push_gfx_seq_idx(nir_builder *b, struct nvk_nir_push *p,
// TODO: Compute
assert(!(pc_range->stageFlags & VK_SHADER_STAGE_COMPUTE_BIT));
assert(pc_range->offset % 4 == 0);
assert(pc_range->size == 4);
nvk_nir_P_1INC(b, p, NV9097, LOAD_CONSTANT_BUFFER_OFFSET, 2);
nvk_nir_push_dw(b, p, nir_imm_int(b,
nvk_root_descriptor_offset(push) + pc_range->offset));
build_push_write_push_const(b, p, pc_range);
nvk_nir_push_dw(b, p, seq_idx);
}