diff --git a/.pick_status.json b/.pick_status.json index 16e2465e457..77168e14fb6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -6454,7 +6454,7 @@ "description": "hasvk: add state cache invalidation back before fast clears", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "87149cc545afdacb339a933d47ded5c1adf8f429", "notes": null diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h index 7f5f24be140..86df2c835b6 100644 --- a/src/intel/blorp/blorp.h +++ b/src/intel/blorp/blorp.h @@ -135,6 +135,12 @@ struct blorp_address { bool local_hint; }; +static inline bool +blorp_address_is_null(struct blorp_address address) +{ + return address.buffer == NULL && address.offset == 0; +} + struct blorp_surf { const struct isl_surf *surf; diff --git a/src/intel/vulkan_hasvk/anv_blorp.c b/src/intel/vulkan_hasvk/anv_blorp.c index f2cead534af..5039067bb7b 100644 --- a/src/intel/vulkan_hasvk/anv_blorp.c +++ b/src/intel/vulkan_hasvk/anv_blorp.c @@ -1826,6 +1826,12 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, ANV_PIPE_END_OF_PIPE_SYNC_BIT, "before fast clear mcs"); + if (!blorp_address_is_null(surf.clear_color_addr)) { + anv_add_pending_pipe_bits(cmd_buffer, + ANV_PIPE_STATE_CACHE_INVALIDATE_BIT, + "before blorp clear color edit"); + } + switch (mcs_op) { case ISL_AUX_OP_FAST_CLEAR: blorp_fast_clear(&batch, &surf, format, swizzle, @@ -1914,6 +1920,12 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer, ANV_PIPE_END_OF_PIPE_SYNC_BIT, "before fast clear ccs"); + if (!blorp_address_is_null(surf.clear_color_addr)) { + anv_add_pending_pipe_bits(cmd_buffer, + ANV_PIPE_STATE_CACHE_INVALIDATE_BIT, + "before blorp clear color edit"); + } + switch (ccs_op) { case ISL_AUX_OP_FAST_CLEAR: blorp_fast_clear(&batch, &surf, format, swizzle,