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i965: Disable register spilling on Ivybridge for now.

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The data port messages for this are rather different.  For now, fail to
compile rather than hanging the GPU.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Kenneth Graunke 2011-05-13 09:25:27 -07:00
parent 344283de5d
commit 7f5e0d2a90
1 changed files with 2 additions and 0 deletions
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2
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
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@ -244,6 +244,8 @@ fs_visitor::assign_regs()
if (reg == -1) {
fail("no register to spill\n");
} else if (intel->gen >= 7) {
fail("no spilling support on gen7 yet\n");
} else if (c->dispatch_width == 16) {
fail("no spilling support on 16-wide yet\n");
} else {