mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-04-25 04:50:38 +02:00
Unify vertex/fragment program instuctions.
Based on patch by Ian (#4967) but also unify instruction opcodes.
This commit is contained in:
parent
73347516be
commit
7e807510d8
31 changed files with 1170 additions and 1067 deletions
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@ -36,7 +36,7 @@
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#include "i915_context.h"
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#include "i915_program.h"
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#include "nvfragprog.h"
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#include "program_instruction.h"
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#include "program.h"
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#include "arbfragparse.h"
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@ -63,7 +63,7 @@ static const GLfloat cos_constants[4] = { 1.0,
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* constants, apply swizzling and negation as needed.
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*/
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static GLuint src_vector( struct i915_fragment_program *p,
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const struct fp_src_register *source,
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const struct prog_src_register *source,
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const struct fragment_program *program )
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{
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GLuint src;
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@ -156,7 +156,7 @@ static GLuint src_vector( struct i915_fragment_program *p,
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static GLuint get_result_vector( struct i915_fragment_program *p,
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const struct fp_instruction *inst )
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const struct prog_instruction *inst )
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{
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switch (inst->DstReg.File) {
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case PROGRAM_OUTPUT:
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@ -178,7 +178,7 @@ static GLuint get_result_vector( struct i915_fragment_program *p,
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}
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}
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static GLuint get_result_flags( const struct fp_instruction *inst )
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static GLuint get_result_flags( const struct prog_instruction *inst )
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{
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GLuint flags = 0;
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@ -250,7 +250,7 @@ do { \
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static void upload_program( struct i915_fragment_program *p )
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{
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const struct fragment_program *program = p->ctx->FragmentProgram._Current;
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const struct fp_instruction *inst = program->Instructions;
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const struct prog_instruction *inst = program->Instructions;
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/* _mesa_debug_fp_inst(program->Base.NumInstructions, inst); */
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@ -258,7 +258,7 @@ static void upload_program( struct i915_fragment_program *p )
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* loaded, as the flagging of an error isn't sufficient to stop
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* this being uploaded to hardware.
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*/
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if (inst[0].Opcode == FP_OPCODE_END) {
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if (inst[0].Opcode == OPCODE_END) {
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GLuint tmp = i915_get_utemp( p );
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i915_emit_arith( p,
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A0_MOV,
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@ -273,7 +273,7 @@ static void upload_program( struct i915_fragment_program *p )
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GLuint tmp = 0;
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switch (inst->Opcode) {
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case FP_OPCODE_ABS:
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case OPCODE_ABS:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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i915_emit_arith( p,
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A0_MAX,
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@ -282,11 +282,11 @@ static void upload_program( struct i915_fragment_program *p )
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src0, negate(src0, 1,1,1,1), 0);
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break;
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case FP_OPCODE_ADD:
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case OPCODE_ADD:
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EMIT_2ARG_ARITH( A0_ADD );
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break;
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case FP_OPCODE_CMP:
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case OPCODE_CMP:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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src1 = src_vector( p, &inst->SrcReg[1], program);
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src2 = src_vector( p, &inst->SrcReg[2], program);
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@ -297,7 +297,7 @@ static void upload_program( struct i915_fragment_program *p )
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src0, src2, src1); /* NOTE: order of src2, src1 */
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break;
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case FP_OPCODE_COS:
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case OPCODE_COS:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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tmp = i915_get_utemp( p );
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@ -356,15 +356,15 @@ static void upload_program( struct i915_fragment_program *p )
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break;
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case FP_OPCODE_DP3:
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case OPCODE_DP3:
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EMIT_2ARG_ARITH( A0_DP3 );
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break;
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case FP_OPCODE_DP4:
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case OPCODE_DP4:
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EMIT_2ARG_ARITH( A0_DP4 );
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break;
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case FP_OPCODE_DPH:
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case OPCODE_DPH:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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src1 = src_vector( p, &inst->SrcReg[1], program);
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@ -375,7 +375,7 @@ static void upload_program( struct i915_fragment_program *p )
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swizzle(src0, X,Y,Z,ONE), src1, 0);
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break;
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case FP_OPCODE_DST:
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case OPCODE_DST:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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src1 = src_vector( p, &inst->SrcReg[1], program);
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@ -393,7 +393,7 @@ static void upload_program( struct i915_fragment_program *p )
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0);
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break;
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case FP_OPCODE_EX2:
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case OPCODE_EX2:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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i915_emit_arith( p,
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@ -403,15 +403,15 @@ static void upload_program( struct i915_fragment_program *p )
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swizzle(src0,X,X,X,X), 0, 0);
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break;
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case FP_OPCODE_FLR:
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case OPCODE_FLR:
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EMIT_1ARG_ARITH( A0_FLR );
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break;
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case FP_OPCODE_FRC:
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case OPCODE_FRC:
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EMIT_1ARG_ARITH( A0_FRC );
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break;
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case FP_OPCODE_KIL:
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case OPCODE_KIL:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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tmp = i915_get_utemp( p );
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@ -422,7 +422,7 @@ static void upload_program( struct i915_fragment_program *p )
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T0_TEXKILL );
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break;
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case FP_OPCODE_LG2:
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case OPCODE_LG2:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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i915_emit_arith( p,
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@ -432,7 +432,7 @@ static void upload_program( struct i915_fragment_program *p )
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swizzle(src0,X,X,X,X), 0, 0);
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break;
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case FP_OPCODE_LIT:
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case OPCODE_LIT:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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tmp = i915_get_utemp( p );
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@ -465,7 +465,7 @@ static void upload_program( struct i915_fragment_program *p )
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break;
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case FP_OPCODE_LRP:
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case OPCODE_LRP:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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src1 = src_vector( p, &inst->SrcReg[1], program);
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src2 = src_vector( p, &inst->SrcReg[2], program);
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@ -489,15 +489,15 @@ static void upload_program( struct i915_fragment_program *p )
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negate(src2, 1,1,1,1), src0, tmp );
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break;
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case FP_OPCODE_MAD:
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case OPCODE_MAD:
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EMIT_3ARG_ARITH( A0_MAD );
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break;
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case FP_OPCODE_MAX:
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case OPCODE_MAX:
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EMIT_2ARG_ARITH( A0_MAX );
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break;
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case FP_OPCODE_MIN:
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case OPCODE_MIN:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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src1 = src_vector( p, &inst->SrcReg[1], program);
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tmp = i915_get_utemp( p );
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@ -516,15 +516,15 @@ static void upload_program( struct i915_fragment_program *p )
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negate(tmp, 1,1,1,1), 0, 0);
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break;
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case FP_OPCODE_MOV:
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case OPCODE_MOV:
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EMIT_1ARG_ARITH( A0_MOV );
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break;
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case FP_OPCODE_MUL:
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case OPCODE_MUL:
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EMIT_2ARG_ARITH( A0_MUL );
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break;
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case FP_OPCODE_POW:
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case OPCODE_POW:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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src1 = src_vector( p, &inst->SrcReg[1], program);
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tmp = i915_get_utemp( p );
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@ -551,7 +551,7 @@ static void upload_program( struct i915_fragment_program *p )
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break;
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case FP_OPCODE_RCP:
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case OPCODE_RCP:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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i915_emit_arith( p,
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@ -561,7 +561,7 @@ static void upload_program( struct i915_fragment_program *p )
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swizzle(src0,X,X,X,X), 0, 0);
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break;
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case FP_OPCODE_RSQ:
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case OPCODE_RSQ:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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@ -572,7 +572,7 @@ static void upload_program( struct i915_fragment_program *p )
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swizzle(src0,X,X,X,X), 0, 0);
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break;
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case FP_OPCODE_SCS:
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case OPCODE_SCS:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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tmp = i915_get_utemp( p );
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@ -634,11 +634,11 @@ static void upload_program( struct i915_fragment_program *p )
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}
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break;
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case FP_OPCODE_SGE:
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case OPCODE_SGE:
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EMIT_2ARG_ARITH( A0_SGE );
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break;
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case FP_OPCODE_SIN:
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case OPCODE_SIN:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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tmp = i915_get_utemp( p );
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@ -696,11 +696,11 @@ static void upload_program( struct i915_fragment_program *p )
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i915_emit_const4fv( p, sin_constants ), 0);
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break;
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case FP_OPCODE_SLT:
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case OPCODE_SLT:
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EMIT_2ARG_ARITH( A0_SLT );
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break;
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case FP_OPCODE_SUB:
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case OPCODE_SUB:
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src0 = src_vector( p, &inst->SrcReg[0], program);
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src1 = src_vector( p, &inst->SrcReg[1], program);
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@ -711,23 +711,23 @@ static void upload_program( struct i915_fragment_program *p )
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src0, negate(src1, 1,1,1,1), 0);
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break;
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case FP_OPCODE_SWZ:
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case OPCODE_SWZ:
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EMIT_1ARG_ARITH( A0_MOV ); /* extended swizzle handled natively */
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break;
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case FP_OPCODE_TEX:
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case OPCODE_TEX:
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EMIT_TEX( T0_TEXLD );
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break;
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case FP_OPCODE_TXB:
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case OPCODE_TXB:
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EMIT_TEX( T0_TEXLDB );
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break;
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case FP_OPCODE_TXP:
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case OPCODE_TXP:
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EMIT_TEX( T0_TEXLDP );
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break;
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case FP_OPCODE_XPD:
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case OPCODE_XPD:
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/* Cross product:
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* result.x = src0.y * src1.z - src0.z * src1.y;
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* result.y = src0.z * src1.x - src0.x * src1.z;
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@ -753,7 +753,7 @@ static void upload_program( struct i915_fragment_program *p )
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negate(tmp,1,1,1,0));
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break;
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case FP_OPCODE_END:
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case OPCODE_END:
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return;
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default:
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@ -49,7 +49,7 @@
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#include "arbfragparse.h"
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#include "program.h"
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#include "nvfragprog.h"
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#include "program_instruction.h"
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#include "r300_context.h"
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#if USE_ARB_F_P == 1
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#include "r300_fragprog.h"
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@ -400,7 +400,7 @@ static pfs_reg_t swizzle(struct r300_fragment_program *rp,
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}
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static pfs_reg_t t_src(struct r300_fragment_program *rp,
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struct fp_src_register fpsrc) {
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struct prog_src_register fpsrc) {
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pfs_reg_t r = pfs_default_reg;
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switch (fpsrc.File) {
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@ -442,7 +442,7 @@ static pfs_reg_t t_src(struct r300_fragment_program *rp,
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}
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static pfs_reg_t t_dst(struct r300_fragment_program *rp,
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struct fp_dst_register dest) {
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struct prog_dst_register dest) {
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pfs_reg_t r = pfs_default_reg;
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switch (dest.File) {
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@ -489,7 +489,7 @@ static void sync_streams(struct r300_fragment_program *rp) {
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}
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static void emit_tex(struct r300_fragment_program *rp,
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struct fp_instruction *fpi,
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struct prog_instruction *fpi,
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int opcode)
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{
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pfs_reg_t coord = t_src(rp, fpi->SrcReg[0]);
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@ -747,37 +747,37 @@ static void emit_arith(struct r300_fragment_program *rp, int op,
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static GLboolean parse_program(struct r300_fragment_program *rp)
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{
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struct fragment_program *mp = &rp->mesa_program;
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const struct fp_instruction *inst = mp->Instructions;
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struct fp_instruction *fpi;
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const struct prog_instruction *inst = mp->Instructions;
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struct prog_instruction *fpi;
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pfs_reg_t src0, src1, src2, dest, temp;
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int flags = 0;
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if (!inst || inst[0].Opcode == FP_OPCODE_END) {
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if (!inst || inst[0].Opcode == OPCODE_END) {
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ERROR("empty program?\n");
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return GL_FALSE;
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}
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for (fpi=mp->Instructions; fpi->Opcode != FP_OPCODE_END; fpi++) {
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for (fpi=mp->Instructions; fpi->Opcode != OPCODE_END; fpi++) {
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if (fpi->Saturate) {
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flags = PFS_FLAG_SAT;
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}
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switch (fpi->Opcode) {
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case FP_OPCODE_ABS:
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case OPCODE_ABS:
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ERROR("unknown fpi->Opcode %d\n", fpi->Opcode);
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break;
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case FP_OPCODE_ADD:
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case OPCODE_ADD:
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emit_arith(rp, PFS_OP_MAD, t_dst(rp, fpi->DstReg), fpi->DstReg.WriteMask,
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t_src(rp, fpi->SrcReg[0]),
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pfs_one,
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t_src(rp, fpi->SrcReg[1]),
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flags);
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break;
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case FP_OPCODE_CMP:
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case FP_OPCODE_COS:
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case OPCODE_CMP:
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case OPCODE_COS:
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ERROR("unknown fpi->Opcode %d\n", fpi->Opcode);
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break;
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case FP_OPCODE_DP3:
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case OPCODE_DP3:
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dest = t_dst(rp, fpi->DstReg);
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if (fpi->DstReg.WriteMask & WRITEMASK_W) {
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/* I assume these need to share the same alu slot */
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@ -792,18 +792,18 @@ static GLboolean parse_program(struct r300_fragment_program *rp)
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t_src(rp, fpi->SrcReg[1]),
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pfs_zero, flags);
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break;
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case FP_OPCODE_DP4:
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case FP_OPCODE_DPH:
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case FP_OPCODE_DST:
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case FP_OPCODE_EX2:
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case FP_OPCODE_FLR:
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case FP_OPCODE_FRC:
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case FP_OPCODE_KIL:
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case FP_OPCODE_LG2:
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case FP_OPCODE_LIT:
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case OPCODE_DP4:
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case OPCODE_DPH:
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case OPCODE_DST:
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case OPCODE_EX2:
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case OPCODE_FLR:
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case OPCODE_FRC:
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case OPCODE_KIL:
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case OPCODE_LG2:
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case OPCODE_LIT:
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ERROR("unknown fpi->Opcode %d\n", fpi->Opcode);
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break;
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case FP_OPCODE_LRP:
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case OPCODE_LRP:
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/* TODO: use the special LRP form if possible */
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src0 = t_src(rp, fpi->SrcReg[0]);
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src1 = t_src(rp, fpi->SrcReg[1]);
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@ -819,31 +819,31 @@ static GLboolean parse_program(struct r300_fragment_program *rp)
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src0, src1, temp, flags);
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free_temp(rp, temp);
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break;
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case FP_OPCODE_MAD:
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case OPCODE_MAD:
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emit_arith(rp, PFS_OP_MAD, t_dst(rp, fpi->DstReg), fpi->DstReg.WriteMask,
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t_src(rp, fpi->SrcReg[0]),
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t_src(rp, fpi->SrcReg[1]),
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t_src(rp, fpi->SrcReg[2]),
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flags);
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break;
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case FP_OPCODE_MAX:
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case FP_OPCODE_MIN:
|
||||
case OPCODE_MAX:
|
||||
case OPCODE_MIN:
|
||||
ERROR("unknown fpi->Opcode %d\n", fpi->Opcode);
|
||||
break;
|
||||
case FP_OPCODE_MOV:
|
||||
case FP_OPCODE_SWZ:
|
||||
case OPCODE_MOV:
|
||||
case OPCODE_SWZ:
|
||||
emit_arith(rp, PFS_OP_MAD, t_dst(rp, fpi->DstReg), fpi->DstReg.WriteMask,
|
||||
t_src(rp, fpi->SrcReg[0]), pfs_one, pfs_zero,
|
||||
flags);
|
||||
break;
|
||||
case FP_OPCODE_MUL:
|
||||
case OPCODE_MUL:
|
||||
emit_arith(rp, PFS_OP_MAD, t_dst(rp, fpi->DstReg), fpi->DstReg.WriteMask,
|
||||
t_src(rp, fpi->SrcReg[0]),
|
||||
t_src(rp, fpi->SrcReg[1]),
|
||||
pfs_zero,
|
||||
flags);
|
||||
break;
|
||||
case FP_OPCODE_POW:
|
||||
case OPCODE_POW:
|
||||
src0 = t_src(rp, fpi->SrcReg[0]);
|
||||
src1 = t_src(rp, fpi->SrcReg[1]);
|
||||
dest = t_dst(rp, fpi->DstReg);
|
||||
|
|
@ -857,38 +857,38 @@ static GLboolean parse_program(struct r300_fragment_program *rp)
|
|||
temp, pfs_zero, pfs_zero, 0);
|
||||
free_temp(rp, temp);
|
||||
break;
|
||||
case FP_OPCODE_RCP:
|
||||
case OPCODE_RCP:
|
||||
ERROR("unknown fpi->Opcode %d\n", fpi->Opcode);
|
||||
break;
|
||||
case FP_OPCODE_RSQ:
|
||||
case OPCODE_RSQ:
|
||||
emit_arith(rp, PFS_OP_RSQ, t_dst(rp, fpi->DstReg),
|
||||
fpi->DstReg.WriteMask,
|
||||
t_src(rp, fpi->SrcReg[0]), pfs_zero, pfs_zero,
|
||||
flags | PFS_FLAG_ABS);
|
||||
break;
|
||||
case FP_OPCODE_SCS:
|
||||
case FP_OPCODE_SGE:
|
||||
case FP_OPCODE_SIN:
|
||||
case FP_OPCODE_SLT:
|
||||
case OPCODE_SCS:
|
||||
case OPCODE_SGE:
|
||||
case OPCODE_SIN:
|
||||
case OPCODE_SLT:
|
||||
ERROR("unknown fpi->Opcode %d\n", fpi->Opcode);
|
||||
break;
|
||||
case FP_OPCODE_SUB:
|
||||
case OPCODE_SUB:
|
||||
emit_arith(rp, PFS_OP_MAD, t_dst(rp, fpi->DstReg), fpi->DstReg.WriteMask,
|
||||
t_src(rp, fpi->SrcReg[0]),
|
||||
pfs_one,
|
||||
negate(t_src(rp, fpi->SrcReg[1])),
|
||||
flags);
|
||||
break;
|
||||
case FP_OPCODE_TEX:
|
||||
case OPCODE_TEX:
|
||||
emit_tex(rp, fpi, R300_FPITX_OP_TEX);
|
||||
break;
|
||||
case FP_OPCODE_TXB:
|
||||
case OPCODE_TXB:
|
||||
emit_tex(rp, fpi, R300_FPITX_OP_TXB);
|
||||
break;
|
||||
case FP_OPCODE_TXP:
|
||||
case OPCODE_TXP:
|
||||
emit_tex(rp, fpi, R300_FPITX_OP_TXP);
|
||||
break;
|
||||
case FP_OPCODE_XPD:
|
||||
case OPCODE_XPD:
|
||||
ERROR("unknown fpi->Opcode %d\n", fpi->Opcode);
|
||||
break;
|
||||
default:
|
||||
|
|
@ -909,7 +909,7 @@ static GLboolean parse_program(struct r300_fragment_program *rp)
|
|||
static void init_program(struct r300_fragment_program *rp)
|
||||
{
|
||||
struct fragment_program *mp = &rp->mesa_program;
|
||||
struct fp_instruction *fpi;
|
||||
struct prog_instruction *fpi;
|
||||
GLuint InputsRead = mp->InputsRead;
|
||||
GLuint temps_used = 0; /* for rp->temps[] */
|
||||
int i;
|
||||
|
|
@ -983,7 +983,7 @@ static void init_program(struct r300_fragment_program *rp)
|
|||
ERROR("No instructions found in program\n");
|
||||
return;
|
||||
}
|
||||
for (fpi=mp->Instructions;fpi->Opcode != FP_OPCODE_END; fpi++) {
|
||||
for (fpi=mp->Instructions;fpi->Opcode != OPCODE_END; fpi++) {
|
||||
for (i=0;i<3;i++) {
|
||||
if (fpi->SrcReg[i].File == PROGRAM_TEMPORARY) {
|
||||
if (!(temps_used & (1 << fpi->SrcReg[i].Index))) {
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
|
||||
#include "program.h"
|
||||
#include "r300_context.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
|
||||
/* representation of a register for emit_arith/swizzle */
|
||||
typedef struct _pfs_reg_t {
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
|
||||
#include "program.h"
|
||||
#include "r300_context.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "program_instruction.h"
|
||||
#if USE_ARB_F_P == 1
|
||||
#include "r300_fragprog.h"
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -36,12 +36,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|||
#include "program.h"
|
||||
#include "r300_context.h"
|
||||
#include "r300_program.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "program_instruction.h"
|
||||
|
||||
#define SCALAR_FLAG (1<<31)
|
||||
#define FLAG_MASK (1<<31)
|
||||
#define OP_MASK (0xf) /* we are unlikely to have more than 15 */
|
||||
#define OPN(operator, ip, op) {#operator, VP_OPCODE_##operator, ip, op}
|
||||
#define OPN(operator, ip, op) {#operator, OPCODE_##operator, ip, op}
|
||||
|
||||
static struct{
|
||||
char *name;
|
||||
|
|
@ -186,7 +186,7 @@ void dump_program_params(GLcontext *ctx, struct vertex_program *vp)
|
|||
|
||||
void debug_vp(GLcontext *ctx, struct vertex_program *vp)
|
||||
{
|
||||
struct vp_instruction *vpi;
|
||||
struct prog_instruction *vpi;
|
||||
int i, operand_index;
|
||||
int operator_index;
|
||||
|
||||
|
|
@ -195,7 +195,7 @@ void debug_vp(GLcontext *ctx, struct vertex_program *vp)
|
|||
vpi=vp->Instructions;
|
||||
|
||||
for(;; vpi++){
|
||||
if(vpi->Opcode == VP_OPCODE_END)
|
||||
if(vpi->Opcode == OPCODE_END)
|
||||
break;
|
||||
|
||||
for(i=0; i < sizeof(op_names) / sizeof(*op_names); i++){
|
||||
|
|
@ -315,7 +315,7 @@ static unsigned long t_dst_class(enum register_file file)
|
|||
}
|
||||
}
|
||||
|
||||
static unsigned long t_dst_index(struct r300_vertex_program *vp, struct vp_dst_register *dst)
|
||||
static unsigned long t_dst_index(struct r300_vertex_program *vp, struct prog_dst_register *dst)
|
||||
{
|
||||
if(dst->File == PROGRAM_OUTPUT) {
|
||||
if (vp->outputs[dst->Index] != -1)
|
||||
|
|
@ -385,7 +385,7 @@ static void vp_dump_inputs(struct r300_vertex_program *vp, char *caller)
|
|||
|
||||
}
|
||||
|
||||
static unsigned long t_src_index(struct r300_vertex_program *vp, struct vp_src_register *src)
|
||||
static unsigned long t_src_index(struct r300_vertex_program *vp, struct prog_src_register *src)
|
||||
{
|
||||
int i;
|
||||
int max_reg=-1;
|
||||
|
|
@ -408,7 +408,7 @@ static unsigned long t_src_index(struct r300_vertex_program *vp, struct vp_src_r
|
|||
}
|
||||
}
|
||||
|
||||
static unsigned long t_src(struct r300_vertex_program *vp, struct vp_src_register *src)
|
||||
static unsigned long t_src(struct r300_vertex_program *vp, struct prog_src_register *src)
|
||||
{
|
||||
|
||||
return MAKE_VSF_SOURCE(t_src_index(vp, src),
|
||||
|
|
@ -420,7 +420,7 @@ static unsigned long t_src(struct r300_vertex_program *vp, struct vp_src_registe
|
|||
src->Negate ? VSF_FLAG_ALL : VSF_FLAG_NONE);
|
||||
}
|
||||
|
||||
static unsigned long t_src_scalar(struct r300_vertex_program *vp, struct vp_src_register *src)
|
||||
static unsigned long t_src_scalar(struct r300_vertex_program *vp, struct prog_src_register *src)
|
||||
{
|
||||
|
||||
return MAKE_VSF_SOURCE(t_src_index(vp, src),
|
||||
|
|
@ -436,21 +436,21 @@ static unsigned long t_opcode(enum vp_opcode opcode)
|
|||
{
|
||||
|
||||
switch(opcode){
|
||||
case VP_OPCODE_DST: return R300_VPI_OUT_OP_DST;
|
||||
case VP_OPCODE_EX2: return R300_VPI_OUT_OP_EX2;
|
||||
case VP_OPCODE_EXP: return R300_VPI_OUT_OP_EXP;
|
||||
case VP_OPCODE_FRC: return R300_VPI_OUT_OP_FRC;
|
||||
case VP_OPCODE_LG2: return R300_VPI_OUT_OP_LG2;
|
||||
case VP_OPCODE_LOG: return R300_VPI_OUT_OP_LOG;
|
||||
case VP_OPCODE_MAX: return R300_VPI_OUT_OP_MAX;
|
||||
case VP_OPCODE_MIN: return R300_VPI_OUT_OP_MIN;
|
||||
case VP_OPCODE_MUL: return R300_VPI_OUT_OP_MUL;
|
||||
case VP_OPCODE_POW: return R300_VPI_OUT_OP_POW;
|
||||
case VP_OPCODE_RCP: return R300_VPI_OUT_OP_RCP;
|
||||
case VP_OPCODE_RSQ: return R300_VPI_OUT_OP_RSQ;
|
||||
case VP_OPCODE_SGE: return R300_VPI_OUT_OP_SGE;
|
||||
case VP_OPCODE_SLT: return R300_VPI_OUT_OP_SLT;
|
||||
case VP_OPCODE_DP4: return R300_VPI_OUT_OP_DOT;
|
||||
case OPCODE_DST: return R300_VPI_OUT_OP_DST;
|
||||
case OPCODE_EX2: return R300_VPI_OUT_OP_EX2;
|
||||
case OPCODE_EXP: return R300_VPI_OUT_OP_EXP;
|
||||
case OPCODE_FRC: return R300_VPI_OUT_OP_FRC;
|
||||
case OPCODE_LG2: return R300_VPI_OUT_OP_LG2;
|
||||
case OPCODE_LOG: return R300_VPI_OUT_OP_LOG;
|
||||
case OPCODE_MAX: return R300_VPI_OUT_OP_MAX;
|
||||
case OPCODE_MIN: return R300_VPI_OUT_OP_MIN;
|
||||
case OPCODE_MUL: return R300_VPI_OUT_OP_MUL;
|
||||
case OPCODE_POW: return R300_VPI_OUT_OP_POW;
|
||||
case OPCODE_RCP: return R300_VPI_OUT_OP_RCP;
|
||||
case OPCODE_RSQ: return R300_VPI_OUT_OP_RSQ;
|
||||
case OPCODE_SGE: return R300_VPI_OUT_OP_SGE;
|
||||
case OPCODE_SLT: return R300_VPI_OUT_OP_SLT;
|
||||
case OPCODE_DP4: return R300_VPI_OUT_OP_DOT;
|
||||
|
||||
default:
|
||||
fprintf(stderr, "%s: Should not be called with opcode %d!", __FUNCTION__, opcode);
|
||||
|
|
@ -484,7 +484,7 @@ static unsigned long op_operands(enum vp_opcode opcode)
|
|||
void translate_vertex_shader(struct r300_vertex_program *vp)
|
||||
{
|
||||
struct vertex_program *mesa_vp=(void *)vp;
|
||||
struct vp_instruction *vpi;
|
||||
struct prog_instruction *vpi;
|
||||
int i, cur_reg=0;
|
||||
VERTEX_SHADER_INSTRUCTION *o_inst;
|
||||
unsigned long operands;
|
||||
|
|
@ -495,7 +495,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
Smart enough to realize that it doesnt need it? */
|
||||
int u_temp_i=VSF_MAX_FRAGMENT_TEMPS-1;
|
||||
#ifdef SRCS_WRITABLE
|
||||
struct vp_src_register src[3];
|
||||
struct prog_src_register src[3];
|
||||
#else
|
||||
#define src vpi->SrcReg
|
||||
#endif
|
||||
|
|
@ -541,7 +541,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
vp->outputs[i] = cur_reg++;
|
||||
|
||||
o_inst=vp->program.body.i;
|
||||
for(vpi=mesa_vp->Instructions; vpi->Opcode != VP_OPCODE_END; vpi++, o_inst++){
|
||||
for(vpi=mesa_vp->Instructions; vpi->Opcode != OPCODE_END; vpi++, o_inst++){
|
||||
|
||||
operands=op_operands(vpi->Opcode);
|
||||
are_srcs_scalar=operands & SCALAR_FLAG;
|
||||
|
|
@ -599,7 +599,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
/* these ops need special handling.
|
||||
Ops that need temp vars should probably be given reg indexes starting at the end of tmp area. */
|
||||
switch(vpi->Opcode){
|
||||
case VP_OPCODE_MOV://ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO}
|
||||
case OPCODE_MOV://ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO}
|
||||
#if 1
|
||||
o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
|
||||
t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File));
|
||||
|
|
@ -630,7 +630,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_ADD:
|
||||
case OPCODE_ADD:
|
||||
hw_op=(src[0].File == PROGRAM_TEMPORARY &&
|
||||
src[1].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD;
|
||||
|
||||
|
|
@ -644,7 +644,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
o_inst->src3=t_src(vp, &src[1]);
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_MAD:
|
||||
case OPCODE_MAD:
|
||||
hw_op=(src[0].File == PROGRAM_TEMPORARY &&
|
||||
src[1].File == PROGRAM_TEMPORARY &&
|
||||
src[2].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD;
|
||||
|
|
@ -656,7 +656,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
o_inst->src3=t_src(vp, &src[2]);
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_MUL: /* HW mul can take third arg but appears to have some other limitations. */
|
||||
case OPCODE_MUL: /* HW mul can take third arg but appears to have some other limitations. */
|
||||
hw_op=(src[0].File == PROGRAM_TEMPORARY &&
|
||||
src[1].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD;
|
||||
|
||||
|
|
@ -671,7 +671,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
t_src_class(src[1].File), VSF_FLAG_NONE);
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_DP3://DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ZERO} PARAM 0{} {X Y Z ZERO}
|
||||
case OPCODE_DP3://DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ZERO} PARAM 0{} {X Y Z ZERO}
|
||||
o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg),
|
||||
t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File));
|
||||
|
||||
|
|
@ -694,7 +694,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
o_inst->src3=0;
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_SUB://ADD RESULT 1.X Y Z W TMP 0{} {X Y Z W} PARAM 1{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
|
||||
case OPCODE_SUB://ADD RESULT 1.X Y Z W TMP 0{} {X Y Z W} PARAM 1{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
|
||||
#if 1
|
||||
hw_op=(src[0].File == PROGRAM_TEMPORARY &&
|
||||
src[1].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD;
|
||||
|
|
@ -729,7 +729,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
#endif
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_ABS://MAX RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
|
||||
case OPCODE_ABS://MAX RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
|
||||
o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_MAX, t_dst_index(vp, &vpi->DstReg),
|
||||
t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File));
|
||||
|
||||
|
|
@ -744,7 +744,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
o_inst->src3=0;
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_FLR:
|
||||
case OPCODE_FLR:
|
||||
/* FRC TMP 0.X Y Z W PARAM 0{} {X Y Z W}
|
||||
ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} TMP 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W */
|
||||
|
||||
|
|
@ -773,7 +773,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
u_temp_i--;
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_LG2:// LG2 RESULT 1.X Y Z W PARAM 0{} {X X X X}
|
||||
case OPCODE_LG2:// LG2 RESULT 1.X Y Z W PARAM 0{} {X X X X}
|
||||
o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_LG2, t_dst_index(vp, &vpi->DstReg),
|
||||
t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File));
|
||||
|
||||
|
|
@ -788,7 +788,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
o_inst->src3=0;
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_LIT://LIT TMP 1.Y Z TMP 1{} {X W Z Y} TMP 1{} {Y W Z X} TMP 1{} {Y X Z W}
|
||||
case OPCODE_LIT://LIT TMP 1.Y Z TMP 1{} {X W Z Y} TMP 1{} {Y W Z X} TMP 1{} {Y X Z W}
|
||||
o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_LIT, t_dst_index(vp, &vpi->DstReg),
|
||||
t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File));
|
||||
/* NOTE: Users swizzling might not work. */
|
||||
|
|
@ -815,7 +815,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
src[0].Negate ? VSF_FLAG_ALL : VSF_FLAG_NONE);
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_DPH://DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ONE} PARAM 0{} {X Y Z W}
|
||||
case OPCODE_DPH://DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ONE} PARAM 0{} {X Y Z W}
|
||||
o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg),
|
||||
t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File));
|
||||
|
||||
|
|
@ -830,7 +830,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
o_inst->src3=0;
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_XPD:
|
||||
case OPCODE_XPD:
|
||||
/* mul r0, r1.yzxw, r2.zxyw
|
||||
mad r0, -r2.yzxw, r1.zxyw, r0
|
||||
NOTE: might need MAD_2
|
||||
|
|
@ -892,15 +892,15 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
|
|||
|
||||
goto next;
|
||||
|
||||
case VP_OPCODE_ARL:
|
||||
case VP_OPCODE_SWZ:
|
||||
case VP_OPCODE_RCC:
|
||||
case VP_OPCODE_PRINT:
|
||||
case OPCODE_ARL:
|
||||
case OPCODE_SWZ:
|
||||
case OPCODE_RCC:
|
||||
case OPCODE_PRINT:
|
||||
//vp->num_temporaries++;
|
||||
fprintf(stderr, "Dont know how to handle op %d yet\n", vpi->Opcode);
|
||||
exit(-1);
|
||||
break;
|
||||
case VP_OPCODE_END:
|
||||
case OPCODE_END:
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -35,8 +35,6 @@
|
|||
#include "mtypes.h"
|
||||
#include "macros.h"
|
||||
#include "colormac.h"
|
||||
#include "nvfragprog.h"
|
||||
|
||||
#include "swrast/swrast.h"
|
||||
#include "swrast_setup/swrast_setup.h"
|
||||
#include "tnl/t_context.h"
|
||||
|
|
|
|||
|
|
@ -1744,8 +1744,7 @@ enum register_file
|
|||
|
||||
|
||||
/** Vertex and fragment instructions */
|
||||
struct vp_instruction;
|
||||
struct fp_instruction;
|
||||
struct prog_instruction;
|
||||
struct atifs_instruction;
|
||||
struct atifs_setupinst;
|
||||
struct program_parameter_list;
|
||||
|
|
@ -1781,7 +1780,7 @@ struct program
|
|||
struct vertex_program
|
||||
{
|
||||
struct program Base; /* base class */
|
||||
struct vp_instruction *Instructions; /* Compiled instructions */
|
||||
struct prog_instruction *Instructions; /* Compiled instructions */
|
||||
GLboolean IsNVProgram; /* GL_NV_vertex_program ? */
|
||||
GLboolean IsPositionInvariant; /* GL_NV_vertex_program1_1 */
|
||||
GLbitfield InputsRead; /* Bitmask of which input regs are read */
|
||||
|
|
@ -1795,7 +1794,7 @@ struct vertex_program
|
|||
struct fragment_program
|
||||
{
|
||||
struct program Base; /**< base class */
|
||||
struct fp_instruction *Instructions; /**< Compiled instructions */
|
||||
struct prog_instruction *Instructions; /**< Compiled instructions */
|
||||
GLbitfield InputsRead; /**< Bitmask of which input regs are read */
|
||||
GLbitfield OutputsWritten; /**< Bitmask of which output regs are written to */
|
||||
GLbitfield TexturesUsed[MAX_TEXTURE_IMAGE_UNITS]; /**< TEXTURE_x_INDEX bitmask */
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
#include "texenvprogram.h"
|
||||
|
||||
#include "shader/program.h"
|
||||
#include "shader/nvfragprog.h"
|
||||
#include "shader/program_instruction.h"
|
||||
#include "shader/arbfragparse.h"
|
||||
|
||||
|
||||
|
|
@ -446,7 +446,7 @@ static struct ureg register_input( struct texenv_fragment_program *p, GLuint inp
|
|||
}
|
||||
|
||||
|
||||
static void emit_arg( struct fp_src_register *reg,
|
||||
static void emit_arg( struct prog_src_register *reg,
|
||||
struct ureg ureg )
|
||||
{
|
||||
reg->File = ureg.file;
|
||||
|
|
@ -457,7 +457,7 @@ static void emit_arg( struct fp_src_register *reg,
|
|||
reg->NegateAbs = ureg.negateabs;
|
||||
}
|
||||
|
||||
static void emit_dst( struct fp_dst_register *dst,
|
||||
static void emit_dst( struct prog_dst_register *dst,
|
||||
struct ureg ureg, GLuint mask )
|
||||
{
|
||||
dst->File = ureg.file;
|
||||
|
|
@ -467,7 +467,7 @@ static void emit_dst( struct fp_dst_register *dst,
|
|||
dst->CondSwizzle = 0;
|
||||
}
|
||||
|
||||
static struct fp_instruction *
|
||||
static struct prog_instruction *
|
||||
emit_op(struct texenv_fragment_program *p,
|
||||
GLuint op,
|
||||
struct ureg dest,
|
||||
|
|
@ -478,7 +478,7 @@ emit_op(struct texenv_fragment_program *p,
|
|||
struct ureg src2 )
|
||||
{
|
||||
GLuint nr = p->program->Base.NumInstructions++;
|
||||
struct fp_instruction *inst = &p->program->Instructions[nr];
|
||||
struct prog_instruction *inst = &p->program->Instructions[nr];
|
||||
|
||||
_mesa_memset(inst, 0, sizeof(*inst));
|
||||
inst->Opcode = op;
|
||||
|
|
@ -537,14 +537,14 @@ static struct ureg emit_texld( struct texenv_fragment_program *p,
|
|||
GLuint tex_idx,
|
||||
struct ureg coord )
|
||||
{
|
||||
struct fp_instruction *inst = emit_op( p, op,
|
||||
struct prog_instruction *inst = emit_op( p, op,
|
||||
dest, destmask,
|
||||
0, /* don't saturate? */
|
||||
coord, /* arg 0? */
|
||||
undef,
|
||||
undef);
|
||||
|
||||
inst->TexSrcIdx = tex_idx;
|
||||
inst->TexSrcTarget = tex_idx;
|
||||
inst->TexSrcUnit = tex_unit;
|
||||
|
||||
p->program->NumTexInstructions++;
|
||||
|
|
@ -671,7 +671,7 @@ static struct ureg emit_combine_source( struct texenv_fragment_program *p,
|
|||
*/
|
||||
arg = get_temp( p );
|
||||
one = get_one( p );
|
||||
return emit_arith( p, FP_OPCODE_SUB, arg, mask, 0, one, src, undef);
|
||||
return emit_arith( p, OPCODE_SUB, arg, mask, 0, one, src, undef);
|
||||
|
||||
case OPR_SRC_ALPHA:
|
||||
if (mask == WRITEMASK_W)
|
||||
|
|
@ -684,7 +684,7 @@ static struct ureg emit_combine_source( struct texenv_fragment_program *p,
|
|||
*/
|
||||
arg = get_temp(p);
|
||||
one = get_one(p);
|
||||
return emit_arith(p, FP_OPCODE_SUB, arg, mask, 0,
|
||||
return emit_arith(p, OPCODE_SUB, arg, mask, 0,
|
||||
one, swizzle1(src, W), undef);
|
||||
case OPR_ZERO:
|
||||
return get_zero(p);
|
||||
|
|
@ -752,28 +752,28 @@ static struct ureg emit_combine( struct texenv_fragment_program *p,
|
|||
if (mask == WRITEMASK_XYZW && !saturate)
|
||||
return src[0];
|
||||
else
|
||||
return emit_arith( p, FP_OPCODE_MOV, dest, mask, saturate, src[0], undef, undef );
|
||||
return emit_arith( p, OPCODE_MOV, dest, mask, saturate, src[0], undef, undef );
|
||||
case MODE_MODULATE:
|
||||
return emit_arith( p, FP_OPCODE_MUL, dest, mask, saturate,
|
||||
return emit_arith( p, OPCODE_MUL, dest, mask, saturate,
|
||||
src[0], src[1], undef );
|
||||
case MODE_ADD:
|
||||
return emit_arith( p, FP_OPCODE_ADD, dest, mask, saturate,
|
||||
return emit_arith( p, OPCODE_ADD, dest, mask, saturate,
|
||||
src[0], src[1], undef );
|
||||
case MODE_ADD_SIGNED:
|
||||
/* tmp = arg0 + arg1
|
||||
* result = tmp - .5
|
||||
*/
|
||||
half = get_half(p);
|
||||
emit_arith( p, FP_OPCODE_ADD, tmp, mask, 0, src[0], src[1], undef );
|
||||
emit_arith( p, FP_OPCODE_SUB, dest, mask, saturate, tmp, half, undef );
|
||||
emit_arith( p, OPCODE_ADD, tmp, mask, 0, src[0], src[1], undef );
|
||||
emit_arith( p, OPCODE_SUB, dest, mask, saturate, tmp, half, undef );
|
||||
return dest;
|
||||
case MODE_INTERPOLATE:
|
||||
/* Arg0 * (Arg2) + Arg1 * (1-Arg2) -- note arguments are reordered:
|
||||
*/
|
||||
return emit_arith( p, FP_OPCODE_LRP, dest, mask, saturate, src[2], src[0], src[1] );
|
||||
return emit_arith( p, OPCODE_LRP, dest, mask, saturate, src[2], src[0], src[1] );
|
||||
|
||||
case MODE_SUBTRACT:
|
||||
return emit_arith( p, FP_OPCODE_SUB, dest, mask, saturate, src[0], src[1], undef );
|
||||
return emit_arith( p, OPCODE_SUB, dest, mask, saturate, src[0], src[1], undef );
|
||||
|
||||
case MODE_DOT3_RGBA:
|
||||
case MODE_DOT3_RGBA_EXT:
|
||||
|
|
@ -789,32 +789,32 @@ static struct ureg emit_combine( struct texenv_fragment_program *p,
|
|||
*
|
||||
* dst = tmp0 dot3 tmp1
|
||||
*/
|
||||
emit_arith( p, FP_OPCODE_MAD, tmp0, WRITEMASK_XYZW, 0,
|
||||
emit_arith( p, OPCODE_MAD, tmp0, WRITEMASK_XYZW, 0,
|
||||
two, src[0], neg1);
|
||||
|
||||
if (_mesa_memcmp(&src[0], &src[1], sizeof(struct ureg)) == 0)
|
||||
tmp1 = tmp0;
|
||||
else
|
||||
emit_arith( p, FP_OPCODE_MAD, tmp1, WRITEMASK_XYZW, 0,
|
||||
emit_arith( p, OPCODE_MAD, tmp1, WRITEMASK_XYZW, 0,
|
||||
two, src[1], neg1);
|
||||
emit_arith( p, FP_OPCODE_DP3, dest, mask, saturate, tmp0, tmp1, undef);
|
||||
emit_arith( p, OPCODE_DP3, dest, mask, saturate, tmp0, tmp1, undef);
|
||||
return dest;
|
||||
}
|
||||
case MODE_MODULATE_ADD_ATI:
|
||||
/* Arg0 * Arg2 + Arg1 */
|
||||
return emit_arith( p, FP_OPCODE_MAD, dest, mask, saturate,
|
||||
return emit_arith( p, OPCODE_MAD, dest, mask, saturate,
|
||||
src[0], src[2], src[1] );
|
||||
case MODE_MODULATE_SIGNED_ADD_ATI: {
|
||||
/* Arg0 * Arg2 + Arg1 - 0.5 */
|
||||
struct ureg tmp0 = get_temp(p);
|
||||
half = get_half(p);
|
||||
emit_arith( p, FP_OPCODE_MAD, tmp0, mask, 0, src[0], src[2], src[1] );
|
||||
emit_arith( p, FP_OPCODE_SUB, dest, mask, saturate, tmp0, half, undef );
|
||||
emit_arith( p, OPCODE_MAD, tmp0, mask, 0, src[0], src[2], src[1] );
|
||||
emit_arith( p, OPCODE_SUB, dest, mask, saturate, tmp0, half, undef );
|
||||
return dest;
|
||||
}
|
||||
case MODE_MODULATE_SUBTRACT_ATI:
|
||||
/* Arg0 * Arg2 - Arg1 */
|
||||
emit_arith( p, FP_OPCODE_MAD, dest, mask, 0, src[0], src[2], negate(src[1]) );
|
||||
emit_arith( p, OPCODE_MAD, dest, mask, 0, src[0], src[2], negate(src[1]) );
|
||||
return dest;
|
||||
default:
|
||||
return src[0];
|
||||
|
|
@ -907,7 +907,7 @@ static struct ureg emit_texenv( struct texenv_fragment_program *p, int unit )
|
|||
1<<rgb_shift,
|
||||
1<<alpha_shift);
|
||||
}
|
||||
return emit_arith( p, FP_OPCODE_MUL, dest, WRITEMASK_XYZW,
|
||||
return emit_arith( p, OPCODE_MUL, dest, WRITEMASK_XYZW,
|
||||
saturate, out, shift, undef );
|
||||
}
|
||||
else
|
||||
|
|
@ -928,7 +928,7 @@ static void load_texture( struct texenv_fragment_program *p, GLuint unit )
|
|||
|
||||
/* TODO: Use D0_MASK_XY where possible.
|
||||
*/
|
||||
p->src_texture[unit] = emit_texld( p, FP_OPCODE_TXP,
|
||||
p->src_texture[unit] = emit_texld( p, OPCODE_TXP,
|
||||
tmp, WRITEMASK_XYZW,
|
||||
unit, dim, texcoord );
|
||||
}
|
||||
|
|
@ -986,7 +986,7 @@ static void create_new_program(struct state_key *key, GLcontext *ctx,
|
|||
p.state = key;
|
||||
p.program = program;
|
||||
|
||||
p.program->Instructions = MALLOC(sizeof(struct fp_instruction) * 100);
|
||||
p.program->Instructions = MALLOC(sizeof(struct prog_instruction) * 100);
|
||||
p.program->Base.NumInstructions = 0;
|
||||
p.program->Base.Target = GL_FRAGMENT_PROGRAM_ARB;
|
||||
p.program->NumTexIndirections = 1; /* correct? */
|
||||
|
|
@ -1036,19 +1036,19 @@ static void create_new_program(struct state_key *key, GLcontext *ctx,
|
|||
/* Emit specular add.
|
||||
*/
|
||||
struct ureg s = register_input(&p, FRAG_ATTRIB_COL1);
|
||||
emit_arith( &p, FP_OPCODE_ADD, out, WRITEMASK_XYZ, 0, cf, s, undef );
|
||||
emit_arith( &p, FP_OPCODE_MOV, out, WRITEMASK_W, 0, cf, undef, undef );
|
||||
emit_arith( &p, OPCODE_ADD, out, WRITEMASK_XYZ, 0, cf, s, undef );
|
||||
emit_arith( &p, OPCODE_MOV, out, WRITEMASK_W, 0, cf, undef, undef );
|
||||
}
|
||||
else if (_mesa_memcmp(&cf, &out, sizeof(cf)) != 0) {
|
||||
/* Will wind up in here if no texture enabled or a couple of
|
||||
* other scenarios (GL_REPLACE for instance).
|
||||
*/
|
||||
emit_arith( &p, FP_OPCODE_MOV, out, WRITEMASK_XYZW, 0, cf, undef, undef );
|
||||
emit_arith( &p, OPCODE_MOV, out, WRITEMASK_XYZW, 0, cf, undef, undef );
|
||||
}
|
||||
|
||||
/* Finish up:
|
||||
*/
|
||||
emit_arith( &p, FP_OPCODE_END, undef, WRITEMASK_XYZW, 0, undef, undef, undef);
|
||||
emit_arith( &p, OPCODE_END, undef, WRITEMASK_XYZW, 0, undef, undef, undef);
|
||||
|
||||
if (key->fog_enabled) {
|
||||
/* Pull fog mode from GLcontext, the value in the state key is
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@
|
|||
#include "arbfragparse.h"
|
||||
|
||||
void
|
||||
_mesa_debug_fp_inst(GLint num, struct fp_instruction *fp)
|
||||
_mesa_debug_fp_inst(GLint num, struct prog_instruction *fp)
|
||||
{
|
||||
GLint a;
|
||||
|
||||
|
|
@ -190,7 +190,7 @@ _mesa_parse_arb_fragment_program(GLcontext * ctx, GLenum target,
|
|||
{
|
||||
GLuint i;
|
||||
struct arb_program ap;
|
||||
struct fp_instruction *newInstructions;
|
||||
struct prog_instruction *newInstructions;
|
||||
(void) target;
|
||||
|
||||
/* set the program target before parsing */
|
||||
|
|
@ -205,14 +205,14 @@ _mesa_parse_arb_fragment_program(GLcontext * ctx, GLenum target,
|
|||
* fragment_program struct.
|
||||
*/
|
||||
/* copy instruction buffer */
|
||||
newInstructions = (struct fp_instruction *)
|
||||
_mesa_malloc(ap.Base.NumInstructions * sizeof(struct fp_instruction));
|
||||
newInstructions = (struct prog_instruction *)
|
||||
_mesa_malloc(ap.Base.NumInstructions * sizeof(struct prog_instruction));
|
||||
if (!newInstructions) {
|
||||
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glProgramStringARB");
|
||||
return;
|
||||
}
|
||||
_mesa_memcpy(newInstructions, ap.FPInstructions,
|
||||
ap.Base.NumInstructions * sizeof(struct fp_instruction));
|
||||
ap.Base.NumInstructions * sizeof(struct prog_instruction));
|
||||
if (program->Instructions)
|
||||
_mesa_free(program->Instructions);
|
||||
program->Instructions = newInstructions;
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ _mesa_parse_arb_fragment_program(GLcontext * ctx, GLenum target,
|
|||
struct fragment_program *program);
|
||||
|
||||
extern void
|
||||
_mesa_debug_fp_inst(GLint num, struct fp_instruction *fp);
|
||||
_mesa_debug_fp_inst(GLint num, struct prog_instruction *fp);
|
||||
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -37,8 +37,7 @@
|
|||
#include "imports.h"
|
||||
#include "macros.h"
|
||||
#include "program.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "arbprogparse.h"
|
||||
#include "grammar_mesa.h"
|
||||
#include "program.h"
|
||||
|
|
@ -2573,7 +2572,7 @@ static GLuint
|
|||
parse_fp_vector_src_reg(GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head,
|
||||
struct arb_program *program,
|
||||
struct fp_src_register *reg)
|
||||
struct prog_src_register *reg)
|
||||
{
|
||||
enum register_file file;
|
||||
GLint index;
|
||||
|
|
@ -2604,7 +2603,7 @@ parse_fp_vector_src_reg(GLcontext * ctx, GLubyte ** inst,
|
|||
static GLuint
|
||||
parse_fp_dst_reg(GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head, struct arb_program *Program,
|
||||
struct fp_dst_register *reg )
|
||||
struct prog_dst_register *reg )
|
||||
{
|
||||
GLint mask;
|
||||
GLuint idx;
|
||||
|
|
@ -2629,7 +2628,7 @@ static GLuint
|
|||
parse_fp_scalar_src_reg (GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head,
|
||||
struct arb_program *Program,
|
||||
struct fp_src_register *reg )
|
||||
struct prog_src_register *reg )
|
||||
{
|
||||
enum register_file File;
|
||||
GLint Index;
|
||||
|
|
@ -2665,14 +2664,14 @@ parse_fp_scalar_src_reg (GLcontext * ctx, GLubyte ** inst,
|
|||
static GLuint
|
||||
parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head, struct arb_program *Program,
|
||||
struct fp_instruction *fp)
|
||||
struct prog_instruction *fp)
|
||||
{
|
||||
GLint a;
|
||||
GLuint texcoord;
|
||||
GLubyte instClass, type, code;
|
||||
GLboolean rel;
|
||||
|
||||
_mesa_init_fp_instruction(fp);
|
||||
_mesa_init_instruction(fp);
|
||||
|
||||
/* Record the position in the program string for debugging */
|
||||
fp->StringPos = Program->Position;
|
||||
|
|
@ -2704,31 +2703,31 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_ABS_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_ABS:
|
||||
fp->Opcode = FP_OPCODE_ABS;
|
||||
fp->Opcode = OPCODE_ABS;
|
||||
break;
|
||||
|
||||
case OP_FLR_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_FLR:
|
||||
fp->Opcode = FP_OPCODE_FLR;
|
||||
fp->Opcode = OPCODE_FLR;
|
||||
break;
|
||||
|
||||
case OP_FRC_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_FRC:
|
||||
fp->Opcode = FP_OPCODE_FRC;
|
||||
fp->Opcode = OPCODE_FRC;
|
||||
break;
|
||||
|
||||
case OP_LIT_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_LIT:
|
||||
fp->Opcode = FP_OPCODE_LIT;
|
||||
fp->Opcode = OPCODE_LIT;
|
||||
break;
|
||||
|
||||
case OP_MOV_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_MOV:
|
||||
fp->Opcode = FP_OPCODE_MOV;
|
||||
fp->Opcode = OPCODE_MOV;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -2744,44 +2743,44 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_COS_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_COS:
|
||||
fp->Opcode = FP_OPCODE_COS;
|
||||
fp->Opcode = OPCODE_COS;
|
||||
break;
|
||||
|
||||
case OP_EX2_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_EX2:
|
||||
fp->Opcode = FP_OPCODE_EX2;
|
||||
fp->Opcode = OPCODE_EX2;
|
||||
break;
|
||||
|
||||
case OP_LG2_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_LG2:
|
||||
fp->Opcode = FP_OPCODE_LG2;
|
||||
fp->Opcode = OPCODE_LG2;
|
||||
break;
|
||||
|
||||
case OP_RCP_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_RCP:
|
||||
fp->Opcode = FP_OPCODE_RCP;
|
||||
fp->Opcode = OPCODE_RCP;
|
||||
break;
|
||||
|
||||
case OP_RSQ_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_RSQ:
|
||||
fp->Opcode = FP_OPCODE_RSQ;
|
||||
fp->Opcode = OPCODE_RSQ;
|
||||
break;
|
||||
|
||||
case OP_SIN_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_SIN:
|
||||
fp->Opcode = FP_OPCODE_SIN;
|
||||
fp->Opcode = OPCODE_SIN;
|
||||
break;
|
||||
|
||||
case OP_SCS_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_SCS:
|
||||
|
||||
fp->Opcode = FP_OPCODE_SCS;
|
||||
fp->Opcode = OPCODE_SCS;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -2797,7 +2796,7 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_POW_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_POW:
|
||||
fp->Opcode = FP_OPCODE_POW;
|
||||
fp->Opcode = OPCODE_POW;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -2816,73 +2815,73 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_ADD_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_ADD:
|
||||
fp->Opcode = FP_OPCODE_ADD;
|
||||
fp->Opcode = OPCODE_ADD;
|
||||
break;
|
||||
|
||||
case OP_DP3_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_DP3:
|
||||
fp->Opcode = FP_OPCODE_DP3;
|
||||
fp->Opcode = OPCODE_DP3;
|
||||
break;
|
||||
|
||||
case OP_DP4_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_DP4:
|
||||
fp->Opcode = FP_OPCODE_DP4;
|
||||
fp->Opcode = OPCODE_DP4;
|
||||
break;
|
||||
|
||||
case OP_DPH_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_DPH:
|
||||
fp->Opcode = FP_OPCODE_DPH;
|
||||
fp->Opcode = OPCODE_DPH;
|
||||
break;
|
||||
|
||||
case OP_DST_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_DST:
|
||||
fp->Opcode = FP_OPCODE_DST;
|
||||
fp->Opcode = OPCODE_DST;
|
||||
break;
|
||||
|
||||
case OP_MAX_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_MAX:
|
||||
fp->Opcode = FP_OPCODE_MAX;
|
||||
fp->Opcode = OPCODE_MAX;
|
||||
break;
|
||||
|
||||
case OP_MIN_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_MIN:
|
||||
fp->Opcode = FP_OPCODE_MIN;
|
||||
fp->Opcode = OPCODE_MIN;
|
||||
break;
|
||||
|
||||
case OP_MUL_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_MUL:
|
||||
fp->Opcode = FP_OPCODE_MUL;
|
||||
fp->Opcode = OPCODE_MUL;
|
||||
break;
|
||||
|
||||
case OP_SGE_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_SGE:
|
||||
fp->Opcode = FP_OPCODE_SGE;
|
||||
fp->Opcode = OPCODE_SGE;
|
||||
break;
|
||||
|
||||
case OP_SLT_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_SLT:
|
||||
fp->Opcode = FP_OPCODE_SLT;
|
||||
fp->Opcode = OPCODE_SLT;
|
||||
break;
|
||||
|
||||
case OP_SUB_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_SUB:
|
||||
fp->Opcode = FP_OPCODE_SUB;
|
||||
fp->Opcode = OPCODE_SUB;
|
||||
break;
|
||||
|
||||
case OP_XPD_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_XPD:
|
||||
fp->Opcode = FP_OPCODE_XPD;
|
||||
fp->Opcode = OPCODE_XPD;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -2899,19 +2898,19 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_CMP_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_CMP:
|
||||
fp->Opcode = FP_OPCODE_CMP;
|
||||
fp->Opcode = OPCODE_CMP;
|
||||
break;
|
||||
|
||||
case OP_LRP_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_LRP:
|
||||
fp->Opcode = FP_OPCODE_LRP;
|
||||
fp->Opcode = OPCODE_LRP;
|
||||
break;
|
||||
|
||||
case OP_MAD_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_MAD:
|
||||
fp->Opcode = FP_OPCODE_MAD;
|
||||
fp->Opcode = OPCODE_MAD;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -2929,7 +2928,7 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_SWZ_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_SWZ:
|
||||
fp->Opcode = FP_OPCODE_SWZ;
|
||||
fp->Opcode = OPCODE_SWZ;
|
||||
break;
|
||||
}
|
||||
if (parse_fp_dst_reg (ctx, inst, vc_head, Program, &fp->DstReg))
|
||||
|
|
@ -2959,19 +2958,19 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_TEX_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_TEX:
|
||||
fp->Opcode = FP_OPCODE_TEX;
|
||||
fp->Opcode = OPCODE_TEX;
|
||||
break;
|
||||
|
||||
case OP_TXP_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_TXP:
|
||||
fp->Opcode = FP_OPCODE_TXP;
|
||||
fp->Opcode = OPCODE_TXP;
|
||||
break;
|
||||
|
||||
case OP_TXB_SAT:
|
||||
fp->Saturate = 1;
|
||||
case OP_TXB:
|
||||
fp->Opcode = FP_OPCODE_TXB;
|
||||
fp->Opcode = OPCODE_TXB;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -2989,19 +2988,19 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
/* texTarget */
|
||||
switch (*(*inst)++) {
|
||||
case TEXTARGET_1D:
|
||||
fp->TexSrcIdx = TEXTURE_1D_INDEX;
|
||||
fp->TexSrcTarget = TEXTURE_1D_INDEX;
|
||||
break;
|
||||
case TEXTARGET_2D:
|
||||
fp->TexSrcIdx = TEXTURE_2D_INDEX;
|
||||
fp->TexSrcTarget = TEXTURE_2D_INDEX;
|
||||
break;
|
||||
case TEXTARGET_3D:
|
||||
fp->TexSrcIdx = TEXTURE_3D_INDEX;
|
||||
fp->TexSrcTarget = TEXTURE_3D_INDEX;
|
||||
break;
|
||||
case TEXTARGET_RECT:
|
||||
fp->TexSrcIdx = TEXTURE_RECT_INDEX;
|
||||
fp->TexSrcTarget = TEXTURE_RECT_INDEX;
|
||||
break;
|
||||
case TEXTARGET_CUBE:
|
||||
fp->TexSrcIdx = TEXTURE_CUBE_INDEX;
|
||||
fp->TexSrcTarget = TEXTURE_CUBE_INDEX;
|
||||
break;
|
||||
case TEXTARGET_SHADOW1D:
|
||||
case TEXTARGET_SHADOW2D:
|
||||
|
|
@ -3009,14 +3008,14 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
/* TODO ARB_fragment_program_shadow code */
|
||||
break;
|
||||
}
|
||||
Program->TexturesUsed[texcoord] |= (1<<fp->TexSrcIdx);
|
||||
Program->TexturesUsed[texcoord] |= (1<<fp->TexSrcTarget);
|
||||
break;
|
||||
|
||||
case OP_TEX_KIL:
|
||||
Program->UsesKill = 1;
|
||||
if (parse_fp_vector_src_reg(ctx, inst, vc_head, Program, &fp->SrcReg[0]))
|
||||
return 1;
|
||||
fp->Opcode = FP_OPCODE_KIL;
|
||||
fp->Opcode = OPCODE_KIL;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -3026,7 +3025,7 @@ parse_fp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
static GLuint
|
||||
parse_vp_dst_reg(GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head, struct arb_program *Program,
|
||||
struct vp_dst_register *reg )
|
||||
struct prog_dst_register *reg )
|
||||
{
|
||||
GLint mask;
|
||||
GLuint idx;
|
||||
|
|
@ -3053,7 +3052,7 @@ static GLuint
|
|||
parse_vp_address_reg (GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head,
|
||||
struct arb_program *Program,
|
||||
struct vp_dst_register *reg)
|
||||
struct prog_dst_register *reg)
|
||||
{
|
||||
GLint idx;
|
||||
|
||||
|
|
@ -3078,7 +3077,7 @@ static GLuint
|
|||
parse_vp_vector_src_reg(GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head,
|
||||
struct arb_program *program,
|
||||
struct vp_src_register *reg )
|
||||
struct prog_src_register *reg )
|
||||
{
|
||||
enum register_file file;
|
||||
GLint index;
|
||||
|
|
@ -3100,7 +3099,7 @@ parse_vp_vector_src_reg(GLcontext * ctx, GLubyte ** inst,
|
|||
reg->Index = index;
|
||||
reg->Swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1],
|
||||
swizzle[2], swizzle[3]);
|
||||
reg->Negate = negateMask;
|
||||
reg->NegateBase = negateMask;
|
||||
reg->RelAddr = isRelOffset;
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -3110,7 +3109,7 @@ static GLuint
|
|||
parse_vp_scalar_src_reg (GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head,
|
||||
struct arb_program *Program,
|
||||
struct vp_src_register *reg )
|
||||
struct prog_src_register *reg )
|
||||
{
|
||||
enum register_file File;
|
||||
GLint Index;
|
||||
|
|
@ -3131,7 +3130,7 @@ parse_vp_scalar_src_reg (GLcontext * ctx, GLubyte ** inst,
|
|||
reg->File = File;
|
||||
reg->Index = Index;
|
||||
reg->Swizzle = (Swizzle[0] << 0);
|
||||
reg->Negate = Negate;
|
||||
reg->NegateBase = Negate;
|
||||
reg->RelAddr = IsRelOffset;
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -3144,7 +3143,7 @@ parse_vp_scalar_src_reg (GLcontext * ctx, GLubyte ** inst,
|
|||
static GLuint
|
||||
parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
||||
struct var_cache **vc_head, struct arb_program *Program,
|
||||
struct vp_instruction *vp)
|
||||
struct prog_instruction *vp)
|
||||
{
|
||||
GLint a;
|
||||
GLubyte type, code;
|
||||
|
|
@ -3155,14 +3154,14 @@ parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
/* The actual opcode name */
|
||||
code = *(*inst)++;
|
||||
|
||||
_mesa_init_vp_instruction(vp);
|
||||
_mesa_init_instruction(vp);
|
||||
/* Record the position in the program string for debugging */
|
||||
vp->StringPos = Program->Position;
|
||||
|
||||
switch (type) {
|
||||
/* XXX: */
|
||||
case OP_ALU_ARL:
|
||||
vp->Opcode = VP_OPCODE_ARL;
|
||||
vp->Opcode = OPCODE_ARL;
|
||||
|
||||
/* Remember to set SrcReg.RelAddr; */
|
||||
|
||||
|
|
@ -3181,19 +3180,19 @@ parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_ALU_VECTOR:
|
||||
switch (code) {
|
||||
case OP_ABS:
|
||||
vp->Opcode = VP_OPCODE_ABS;
|
||||
vp->Opcode = OPCODE_ABS;
|
||||
break;
|
||||
case OP_FLR:
|
||||
vp->Opcode = VP_OPCODE_FLR;
|
||||
vp->Opcode = OPCODE_FLR;
|
||||
break;
|
||||
case OP_FRC:
|
||||
vp->Opcode = VP_OPCODE_FRC;
|
||||
vp->Opcode = OPCODE_FRC;
|
||||
break;
|
||||
case OP_LIT:
|
||||
vp->Opcode = VP_OPCODE_LIT;
|
||||
vp->Opcode = OPCODE_LIT;
|
||||
break;
|
||||
case OP_MOV:
|
||||
vp->Opcode = VP_OPCODE_MOV;
|
||||
vp->Opcode = OPCODE_MOV;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -3207,22 +3206,22 @@ parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_ALU_SCALAR:
|
||||
switch (code) {
|
||||
case OP_EX2:
|
||||
vp->Opcode = VP_OPCODE_EX2;
|
||||
vp->Opcode = OPCODE_EX2;
|
||||
break;
|
||||
case OP_EXP:
|
||||
vp->Opcode = VP_OPCODE_EXP;
|
||||
vp->Opcode = OPCODE_EXP;
|
||||
break;
|
||||
case OP_LG2:
|
||||
vp->Opcode = VP_OPCODE_LG2;
|
||||
vp->Opcode = OPCODE_LG2;
|
||||
break;
|
||||
case OP_LOG:
|
||||
vp->Opcode = VP_OPCODE_LOG;
|
||||
vp->Opcode = OPCODE_LOG;
|
||||
break;
|
||||
case OP_RCP:
|
||||
vp->Opcode = VP_OPCODE_RCP;
|
||||
vp->Opcode = OPCODE_RCP;
|
||||
break;
|
||||
case OP_RSQ:
|
||||
vp->Opcode = VP_OPCODE_RSQ;
|
||||
vp->Opcode = OPCODE_RSQ;
|
||||
break;
|
||||
}
|
||||
if (parse_vp_dst_reg(ctx, inst, vc_head, Program, &vp->DstReg))
|
||||
|
|
@ -3235,7 +3234,7 @@ parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_ALU_BINSC:
|
||||
switch (code) {
|
||||
case OP_POW:
|
||||
vp->Opcode = VP_OPCODE_POW;
|
||||
vp->Opcode = OPCODE_POW;
|
||||
break;
|
||||
}
|
||||
if (parse_vp_dst_reg(ctx, inst, vc_head, Program, &vp->DstReg))
|
||||
|
|
@ -3250,40 +3249,40 @@ parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_ALU_BIN:
|
||||
switch (code) {
|
||||
case OP_ADD:
|
||||
vp->Opcode = VP_OPCODE_ADD;
|
||||
vp->Opcode = OPCODE_ADD;
|
||||
break;
|
||||
case OP_DP3:
|
||||
vp->Opcode = VP_OPCODE_DP3;
|
||||
vp->Opcode = OPCODE_DP3;
|
||||
break;
|
||||
case OP_DP4:
|
||||
vp->Opcode = VP_OPCODE_DP4;
|
||||
vp->Opcode = OPCODE_DP4;
|
||||
break;
|
||||
case OP_DPH:
|
||||
vp->Opcode = VP_OPCODE_DPH;
|
||||
vp->Opcode = OPCODE_DPH;
|
||||
break;
|
||||
case OP_DST:
|
||||
vp->Opcode = VP_OPCODE_DST;
|
||||
vp->Opcode = OPCODE_DST;
|
||||
break;
|
||||
case OP_MAX:
|
||||
vp->Opcode = VP_OPCODE_MAX;
|
||||
vp->Opcode = OPCODE_MAX;
|
||||
break;
|
||||
case OP_MIN:
|
||||
vp->Opcode = VP_OPCODE_MIN;
|
||||
vp->Opcode = OPCODE_MIN;
|
||||
break;
|
||||
case OP_MUL:
|
||||
vp->Opcode = VP_OPCODE_MUL;
|
||||
vp->Opcode = OPCODE_MUL;
|
||||
break;
|
||||
case OP_SGE:
|
||||
vp->Opcode = VP_OPCODE_SGE;
|
||||
vp->Opcode = OPCODE_SGE;
|
||||
break;
|
||||
case OP_SLT:
|
||||
vp->Opcode = VP_OPCODE_SLT;
|
||||
vp->Opcode = OPCODE_SLT;
|
||||
break;
|
||||
case OP_SUB:
|
||||
vp->Opcode = VP_OPCODE_SUB;
|
||||
vp->Opcode = OPCODE_SUB;
|
||||
break;
|
||||
case OP_XPD:
|
||||
vp->Opcode = VP_OPCODE_XPD;
|
||||
vp->Opcode = OPCODE_XPD;
|
||||
break;
|
||||
}
|
||||
if (parse_vp_dst_reg(ctx, inst, vc_head, Program, &vp->DstReg))
|
||||
|
|
@ -3298,7 +3297,7 @@ parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_ALU_TRI:
|
||||
switch (code) {
|
||||
case OP_MAD:
|
||||
vp->Opcode = VP_OPCODE_MAD;
|
||||
vp->Opcode = OPCODE_MAD;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -3314,7 +3313,7 @@ parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
case OP_ALU_SWZ:
|
||||
switch (code) {
|
||||
case OP_SWZ:
|
||||
vp->Opcode = VP_OPCODE_SWZ;
|
||||
vp->Opcode = OPCODE_SWZ;
|
||||
break;
|
||||
}
|
||||
{
|
||||
|
|
@ -3332,7 +3331,7 @@ parse_vp_instruction (GLcontext * ctx, GLubyte ** inst,
|
|||
parse_extended_swizzle_mask (inst, swizzle, &negateMask);
|
||||
vp->SrcReg[0].File = file;
|
||||
vp->SrcReg[0].Index = index;
|
||||
vp->SrcReg[0].Negate = negateMask;
|
||||
vp->SrcReg[0].NegateBase = negateMask;
|
||||
vp->SrcReg[0].Swizzle = MAKE_SWIZZLE4(swizzle[0],
|
||||
swizzle[1],
|
||||
swizzle[2],
|
||||
|
|
@ -3698,8 +3697,8 @@ parse_arb_program(GLcontext * ctx, GLubyte * inst, struct var_cache **vc_head,
|
|||
/* Finally, tag on an OPCODE_END instruction */
|
||||
if (Program->Base.Target == GL_FRAGMENT_PROGRAM_ARB) {
|
||||
const GLuint numInst = Program->Base.NumInstructions;
|
||||
_mesa_init_fp_instruction(Program->FPInstructions + numInst);
|
||||
Program->FPInstructions[numInst].Opcode = FP_OPCODE_END;
|
||||
_mesa_init_instruction(Program->FPInstructions + numInst);
|
||||
Program->FPInstructions[numInst].Opcode = OPCODE_END;
|
||||
/* YYY Wrong Position in program, whatever, at least not random -> crash
|
||||
Program->Position = parse_position (&inst);
|
||||
*/
|
||||
|
|
@ -3707,8 +3706,8 @@ parse_arb_program(GLcontext * ctx, GLubyte * inst, struct var_cache **vc_head,
|
|||
}
|
||||
else {
|
||||
const GLuint numInst = Program->Base.NumInstructions;
|
||||
_mesa_init_vp_instruction(Program->VPInstructions + numInst);
|
||||
Program->VPInstructions[numInst].Opcode = VP_OPCODE_END;
|
||||
_mesa_init_instruction(Program->VPInstructions + numInst);
|
||||
Program->VPInstructions[numInst].Opcode = OPCODE_END;
|
||||
/* YYY Wrong Position in program, whatever, at least not random -> crash
|
||||
Program->Position = parse_position (&inst);
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -28,8 +28,7 @@
|
|||
|
||||
#include "context.h"
|
||||
#include "mtypes.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
|
||||
|
||||
#define MAX_INSTRUCTIONS 256
|
||||
|
|
@ -53,7 +52,7 @@ struct arb_program
|
|||
GLuint MinorVersion;
|
||||
|
||||
/* ARB_vertex_program specifics */
|
||||
struct vp_instruction VPInstructions[MAX_INSTRUCTIONS];
|
||||
struct prog_instruction VPInstructions[MAX_INSTRUCTIONS];
|
||||
|
||||
/* Options currently recognized by the parser */
|
||||
/* ARB_fp */
|
||||
|
|
@ -64,7 +63,7 @@ struct arb_program
|
|||
GLboolean HintPositionInvariant;
|
||||
|
||||
/* ARB_fragment_program specifics */
|
||||
struct fp_instruction FPInstructions[MAX_INSTRUCTIONS];
|
||||
struct prog_instruction FPInstructions[MAX_INSTRUCTIONS];
|
||||
GLbitfield TexturesUsed[MAX_TEXTURE_IMAGE_UNITS];
|
||||
GLuint NumAluInstructions;
|
||||
GLuint NumTexInstructions;
|
||||
|
|
|
|||
|
|
@ -39,9 +39,8 @@
|
|||
#include "mtypes.h"
|
||||
#include "nvprogram.h"
|
||||
#include "nvfragparse.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "nvvertparse.h"
|
||||
#include "nvvertprog.h"
|
||||
|
||||
|
||||
void GLAPIENTRY
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@
|
|||
#include "program.h"
|
||||
#include "nvprogram.h"
|
||||
#include "nvvertparse.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "program_instruction.h"
|
||||
|
||||
#include "arbprogparse.h"
|
||||
|
||||
|
|
@ -49,7 +49,7 @@
|
|||
* XXX this is probably redundant. We've already got code like this
|
||||
* in the nvvertparse.c file. Combine/clean-up someday.
|
||||
*/
|
||||
void _mesa_debug_vp_inst(GLint num, struct vp_instruction *vp)
|
||||
void _mesa_debug_vp_inst(GLint num, struct prog_instruction *vp)
|
||||
{
|
||||
GLint a;
|
||||
static const char *opcode_string[] = {
|
||||
|
|
@ -115,9 +115,9 @@ void _mesa_debug_vp_inst(GLint num, struct vp_instruction *vp)
|
|||
|
||||
if (vp[a].SrcReg[0].File != 0xf) {
|
||||
if (vp[a].SrcReg[0].Swizzle != SWIZZLE_NOOP ||
|
||||
vp[a].SrcReg[0].Negate)
|
||||
vp[a].SrcReg[0].NegateBase)
|
||||
_mesa_printf("%s[%d].%s%c%c%c%c ", file_string[vp[a].SrcReg[0].File], vp[a].SrcReg[0].Index,
|
||||
vp[a].SrcReg[0].Negate ? "-" : "",
|
||||
vp[a].SrcReg[0].NegateBase ? "-" : "",
|
||||
swz[GET_SWZ(vp[a].SrcReg[0].Swizzle, 0)],
|
||||
swz[GET_SWZ(vp[a].SrcReg[0].Swizzle, 1)],
|
||||
swz[GET_SWZ(vp[a].SrcReg[0].Swizzle, 2)],
|
||||
|
|
@ -128,9 +128,9 @@ void _mesa_debug_vp_inst(GLint num, struct vp_instruction *vp)
|
|||
|
||||
if (vp[a].SrcReg[1].File != 0xf) {
|
||||
if (vp[a].SrcReg[1].Swizzle != SWIZZLE_NOOP ||
|
||||
vp[a].SrcReg[1].Negate)
|
||||
vp[a].SrcReg[1].NegateBase)
|
||||
_mesa_printf("%s[%d].%s%c%c%c%c ", file_string[vp[a].SrcReg[1].File], vp[a].SrcReg[1].Index,
|
||||
vp[a].SrcReg[1].Negate ? "-" : "",
|
||||
vp[a].SrcReg[1].NegateBase ? "-" : "",
|
||||
swz[GET_SWZ(vp[a].SrcReg[1].Swizzle, 0)],
|
||||
swz[GET_SWZ(vp[a].SrcReg[1].Swizzle, 1)],
|
||||
swz[GET_SWZ(vp[a].SrcReg[1].Swizzle, 2)],
|
||||
|
|
@ -141,9 +141,9 @@ void _mesa_debug_vp_inst(GLint num, struct vp_instruction *vp)
|
|||
|
||||
if (vp[a].SrcReg[2].File != 0xf) {
|
||||
if (vp[a].SrcReg[2].Swizzle != SWIZZLE_NOOP ||
|
||||
vp[a].SrcReg[2].Negate)
|
||||
vp[a].SrcReg[2].NegateBase)
|
||||
_mesa_printf("%s[%d].%s%c%c%c%c ", file_string[vp[a].SrcReg[2].File], vp[a].SrcReg[2].Index,
|
||||
vp[a].SrcReg[2].Negate ? "-" : "",
|
||||
vp[a].SrcReg[2].NegateBase ? "-" : "",
|
||||
swz[GET_SWZ(vp[a].SrcReg[2].Swizzle, 0)],
|
||||
swz[GET_SWZ(vp[a].SrcReg[2].Swizzle, 1)],
|
||||
swz[GET_SWZ(vp[a].SrcReg[2].Swizzle, 2)],
|
||||
|
|
@ -169,7 +169,7 @@ _mesa_parse_arb_vertex_program(GLcontext * ctx, GLenum target,
|
|||
{
|
||||
struct arb_program ap;
|
||||
(void) target;
|
||||
struct vp_instruction *newInstructions;
|
||||
struct prog_instruction *newInstructions;
|
||||
|
||||
/* set the program target before parsing */
|
||||
ap.Base.Target = GL_VERTEX_PROGRAM_ARB;
|
||||
|
|
@ -183,14 +183,14 @@ _mesa_parse_arb_vertex_program(GLcontext * ctx, GLenum target,
|
|||
* vertex_program struct.
|
||||
*/
|
||||
/* copy instruction buffer */
|
||||
newInstructions = (struct vp_instruction *)
|
||||
_mesa_malloc(ap.Base.NumInstructions * sizeof(struct vp_instruction));
|
||||
newInstructions = (struct prog_instruction *)
|
||||
_mesa_malloc(ap.Base.NumInstructions * sizeof(struct prog_instruction));
|
||||
if (!newInstructions) {
|
||||
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glProgramStringARB");
|
||||
return;
|
||||
}
|
||||
_mesa_memcpy(newInstructions, ap.VPInstructions,
|
||||
ap.Base.NumInstructions * sizeof(struct vp_instruction));
|
||||
ap.Base.NumInstructions * sizeof(struct prog_instruction));
|
||||
if (program->Instructions)
|
||||
_mesa_free(program->Instructions);
|
||||
program->Instructions = newInstructions;
|
||||
|
|
|
|||
|
|
@ -31,6 +31,6 @@ _mesa_parse_arb_vertex_program(GLcontext * ctx, GLenum target,
|
|||
struct vertex_program *program);
|
||||
|
||||
extern void
|
||||
_mesa_debug_vp_inst(GLint num, struct vp_instruction *vp);
|
||||
_mesa_debug_vp_inst(GLint num, struct prog_instruction *vp);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
/*
|
||||
* Mesa 3-D graphics library
|
||||
* Version: 6.1
|
||||
* Version: 6.5
|
||||
*
|
||||
* Copyright (C) 1999-2004 Brian Paul All Rights Reserved.
|
||||
* Copyright (C) 1999-2005 Brian Paul All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
#include "imports.h"
|
||||
#include "macros.h"
|
||||
#include "mtypes.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "nvfragparse.h"
|
||||
#include "nvprogram.h"
|
||||
#include "program.h"
|
||||
|
|
@ -79,60 +79,60 @@
|
|||
|
||||
struct instruction_pattern {
|
||||
const char *name;
|
||||
enum fp_opcode opcode;
|
||||
enum prog_opcode opcode;
|
||||
GLuint inputs;
|
||||
GLuint outputs;
|
||||
GLuint suffixes;
|
||||
};
|
||||
|
||||
static const struct instruction_pattern Instructions[] = {
|
||||
{ "ADD", FP_OPCODE_ADD, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "COS", FP_OPCODE_COS, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "DDX", FP_OPCODE_DDX, INPUT_1V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "DDY", FP_OPCODE_DDY, INPUT_1V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "DP3", FP_OPCODE_DP3, INPUT_2V, OUTPUT_S, _R | _H | _X | _C | _S },
|
||||
{ "DP4", FP_OPCODE_DP4, INPUT_2V, OUTPUT_S, _R | _H | _X | _C | _S },
|
||||
{ "DST", FP_OPCODE_DP4, INPUT_2V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "EX2", FP_OPCODE_DP4, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "FLR", FP_OPCODE_FLR, INPUT_1V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "FRC", FP_OPCODE_FRC, INPUT_1V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "KIL", FP_OPCODE_KIL_NV, INPUT_CC, OUTPUT_NONE, 0 },
|
||||
{ "LG2", FP_OPCODE_LG2, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "LIT", FP_OPCODE_LIT, INPUT_1V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "LRP", FP_OPCODE_LRP, INPUT_3V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MAD", FP_OPCODE_MAD, INPUT_3V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MAX", FP_OPCODE_MAX, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MIN", FP_OPCODE_MIN, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MOV", FP_OPCODE_MOV, INPUT_1V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MUL", FP_OPCODE_MUL, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "PK2H", FP_OPCODE_PK2H, INPUT_1V, OUTPUT_S, 0 },
|
||||
{ "PK2US", FP_OPCODE_PK2US, INPUT_1V, OUTPUT_S, 0 },
|
||||
{ "PK4B", FP_OPCODE_PK4B, INPUT_1V, OUTPUT_S, 0 },
|
||||
{ "PK4UB", FP_OPCODE_PK4UB, INPUT_1V, OUTPUT_S, 0 },
|
||||
{ "POW", FP_OPCODE_POW, INPUT_2S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "RCP", FP_OPCODE_RCP, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "RFL", FP_OPCODE_RFL, INPUT_2V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "RSQ", FP_OPCODE_RSQ, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "SEQ", FP_OPCODE_SEQ, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SFL", FP_OPCODE_SFL, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SGE", FP_OPCODE_SGE, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SGT", FP_OPCODE_SGT, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SIN", FP_OPCODE_SIN, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "SLE", FP_OPCODE_SLE, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SLT", FP_OPCODE_SLT, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SNE", FP_OPCODE_SNE, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "STR", FP_OPCODE_STR, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SUB", FP_OPCODE_SUB, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "TEX", FP_OPCODE_TEX, INPUT_1V_T, OUTPUT_V, _C | _S },
|
||||
{ "TXD", FP_OPCODE_TXD, INPUT_3V_T, OUTPUT_V, _C | _S },
|
||||
{ "TXP", FP_OPCODE_TXP_NV, INPUT_1V_T, OUTPUT_V, _C | _S },
|
||||
{ "UP2H", FP_OPCODE_UP2H, INPUT_1S, OUTPUT_V, _C | _S },
|
||||
{ "UP2US", FP_OPCODE_UP2US, INPUT_1S, OUTPUT_V, _C | _S },
|
||||
{ "UP4B", FP_OPCODE_UP4B, INPUT_1S, OUTPUT_V, _C | _S },
|
||||
{ "UP4UB", FP_OPCODE_UP4UB, INPUT_1S, OUTPUT_V, _C | _S },
|
||||
{ "X2D", FP_OPCODE_X2D, INPUT_3V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "PRINT", FP_OPCODE_PRINT, INPUT_1V_S, OUTPUT_NONE, 0 },
|
||||
{ NULL, (enum fp_opcode) -1, 0, 0, 0 }
|
||||
{ "ADD", OPCODE_ADD, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "COS", OPCODE_COS, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "DDX", OPCODE_DDX, INPUT_1V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "DDY", OPCODE_DDY, INPUT_1V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "DP3", OPCODE_DP3, INPUT_2V, OUTPUT_S, _R | _H | _X | _C | _S },
|
||||
{ "DP4", OPCODE_DP4, INPUT_2V, OUTPUT_S, _R | _H | _X | _C | _S },
|
||||
{ "DST", OPCODE_DP4, INPUT_2V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "EX2", OPCODE_DP4, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "FLR", OPCODE_FLR, INPUT_1V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "FRC", OPCODE_FRC, INPUT_1V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "KIL", OPCODE_KIL_NV, INPUT_CC, OUTPUT_NONE, 0 },
|
||||
{ "LG2", OPCODE_LG2, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "LIT", OPCODE_LIT, INPUT_1V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "LRP", OPCODE_LRP, INPUT_3V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MAD", OPCODE_MAD, INPUT_3V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MAX", OPCODE_MAX, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MIN", OPCODE_MIN, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MOV", OPCODE_MOV, INPUT_1V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "MUL", OPCODE_MUL, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "PK2H", OPCODE_PK2H, INPUT_1V, OUTPUT_S, 0 },
|
||||
{ "PK2US", OPCODE_PK2US, INPUT_1V, OUTPUT_S, 0 },
|
||||
{ "PK4B", OPCODE_PK4B, INPUT_1V, OUTPUT_S, 0 },
|
||||
{ "PK4UB", OPCODE_PK4UB, INPUT_1V, OUTPUT_S, 0 },
|
||||
{ "POW", OPCODE_POW, INPUT_2S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "RCP", OPCODE_RCP, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "RFL", OPCODE_RFL, INPUT_2V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "RSQ", OPCODE_RSQ, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "SEQ", OPCODE_SEQ, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SFL", OPCODE_SFL, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SGE", OPCODE_SGE, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SGT", OPCODE_SGT, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SIN", OPCODE_SIN, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
|
||||
{ "SLE", OPCODE_SLE, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SLT", OPCODE_SLT, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SNE", OPCODE_SNE, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "STR", OPCODE_STR, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "SUB", OPCODE_SUB, INPUT_2V, OUTPUT_V, _R | _H | _X | _C | _S },
|
||||
{ "TEX", OPCODE_TEX, INPUT_1V_T, OUTPUT_V, _C | _S },
|
||||
{ "TXD", OPCODE_TXD, INPUT_3V_T, OUTPUT_V, _C | _S },
|
||||
{ "TXP", OPCODE_TXP_NV, INPUT_1V_T, OUTPUT_V, _C | _S },
|
||||
{ "UP2H", OPCODE_UP2H, INPUT_1S, OUTPUT_V, _C | _S },
|
||||
{ "UP2US", OPCODE_UP2US, INPUT_1S, OUTPUT_V, _C | _S },
|
||||
{ "UP4B", OPCODE_UP4B, INPUT_1S, OUTPUT_V, _C | _S },
|
||||
{ "UP4UB", OPCODE_UP4UB, INPUT_1S, OUTPUT_V, _C | _S },
|
||||
{ "X2D", OPCODE_X2D, INPUT_3V, OUTPUT_V, _R | _H | _C | _S },
|
||||
{ "PRINT", OPCODE_PRINT, INPUT_1V_S, OUTPUT_NONE, 0 },
|
||||
{ NULL, (enum prog_opcode) -1, 0, 0, 0 }
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -248,7 +248,7 @@ MatchInstruction(const GLubyte *token)
|
|||
return result;
|
||||
}
|
||||
}
|
||||
result.opcode = (enum fp_opcode) -1;
|
||||
result.opcode = (enum prog_opcode) -1;
|
||||
return result;
|
||||
}
|
||||
|
||||
|
|
@ -668,7 +668,7 @@ Parse_SwizzleSuffix(const GLubyte *token, GLuint swizzle[4])
|
|||
|
||||
static GLboolean
|
||||
Parse_CondCodeMask(struct parse_state *parseState,
|
||||
struct fp_dst_register *dstReg)
|
||||
struct prog_dst_register *dstReg)
|
||||
{
|
||||
if (Parse_String(parseState, "EQ"))
|
||||
dstReg->CondMask = COND_EQ;
|
||||
|
|
@ -865,7 +865,7 @@ Parse_OutputReg(struct parse_state *parseState, GLint *outputRegNum)
|
|||
|
||||
static GLboolean
|
||||
Parse_MaskedDstReg(struct parse_state *parseState,
|
||||
struct fp_dst_register *dstReg)
|
||||
struct prog_dst_register *dstReg)
|
||||
{
|
||||
GLubyte token[100];
|
||||
GLint idx;
|
||||
|
|
@ -964,7 +964,7 @@ Parse_MaskedDstReg(struct parse_state *parseState,
|
|||
*/
|
||||
static GLboolean
|
||||
Parse_VectorSrc(struct parse_state *parseState,
|
||||
struct fp_src_register *srcReg)
|
||||
struct prog_src_register *srcReg)
|
||||
{
|
||||
GLfloat sign = 1.0F;
|
||||
GLubyte token[100];
|
||||
|
|
@ -1087,7 +1087,7 @@ Parse_VectorSrc(struct parse_state *parseState,
|
|||
|
||||
static GLboolean
|
||||
Parse_ScalarSrcReg(struct parse_state *parseState,
|
||||
struct fp_src_register *srcReg)
|
||||
struct prog_src_register *srcReg)
|
||||
{
|
||||
GLubyte token[100];
|
||||
GLfloat sign = 1.0F;
|
||||
|
|
@ -1198,7 +1198,7 @@ Parse_ScalarSrcReg(struct parse_state *parseState,
|
|||
|
||||
static GLboolean
|
||||
Parse_PrintInstruction(struct parse_state *parseState,
|
||||
struct fp_instruction *inst)
|
||||
struct prog_instruction *inst)
|
||||
{
|
||||
const GLubyte *str;
|
||||
GLubyte *msg;
|
||||
|
|
@ -1251,15 +1251,15 @@ Parse_PrintInstruction(struct parse_state *parseState,
|
|||
|
||||
static GLboolean
|
||||
Parse_InstructionSequence(struct parse_state *parseState,
|
||||
struct fp_instruction program[])
|
||||
struct prog_instruction program[])
|
||||
{
|
||||
while (1) {
|
||||
struct fp_instruction *inst = program + parseState->numInst;
|
||||
struct prog_instruction *inst = program + parseState->numInst;
|
||||
struct instruction_pattern instMatch;
|
||||
GLubyte token[100];
|
||||
|
||||
/* Initialize the instruction */
|
||||
_mesa_init_fp_instruction(inst);
|
||||
_mesa_init_instruction(inst);
|
||||
|
||||
/* special instructions */
|
||||
if (Parse_String(parseState, "DEFINE")) {
|
||||
|
|
@ -1301,7 +1301,7 @@ Parse_InstructionSequence(struct parse_state *parseState,
|
|||
(const char *) id, value);
|
||||
}
|
||||
else if (Parse_String(parseState, "END")) {
|
||||
inst->Opcode = FP_OPCODE_END;
|
||||
inst->Opcode = OPCODE_END;
|
||||
inst->StringPos = parseState->curLine - parseState->start;
|
||||
assert(inst->StringPos >= 0);
|
||||
parseState->numInst++;
|
||||
|
|
@ -1328,7 +1328,7 @@ Parse_InstructionSequence(struct parse_state *parseState,
|
|||
inst->Opcode = instMatch.opcode;
|
||||
inst->Precision = instMatch.suffixes & (_R | _H | _X);
|
||||
inst->Saturate = (instMatch.suffixes & (_S)) ? GL_TRUE : GL_FALSE;
|
||||
inst->UpdateCondRegister = (instMatch.suffixes & (_C)) ? GL_TRUE : GL_FALSE;
|
||||
inst->CondUpdate = (instMatch.suffixes & (_C)) ? GL_TRUE : GL_FALSE;
|
||||
inst->StringPos = parseState->curLine - parseState->start;
|
||||
assert(inst->StringPos >= 0);
|
||||
|
||||
|
|
@ -1342,7 +1342,7 @@ Parse_InstructionSequence(struct parse_state *parseState,
|
|||
RETURN_ERROR1("Expected ,");
|
||||
}
|
||||
else if (instMatch.outputs == OUTPUT_NONE) {
|
||||
if (instMatch.opcode == FP_OPCODE_KIL_NV) {
|
||||
if (instMatch.opcode == OPCODE_KIL_NV) {
|
||||
/* This is a little weird, the cond code info is in
|
||||
* the dest register.
|
||||
*/
|
||||
|
|
@ -1350,7 +1350,7 @@ Parse_InstructionSequence(struct parse_state *parseState,
|
|||
RETURN_ERROR;
|
||||
}
|
||||
else {
|
||||
ASSERT(instMatch.opcode == FP_OPCODE_PRINT);
|
||||
ASSERT(instMatch.opcode == OPCODE_PRINT);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1402,7 +1402,7 @@ Parse_InstructionSequence(struct parse_state *parseState,
|
|||
if (!Parse_TextureImageId(parseState, &unit, &idx))
|
||||
RETURN_ERROR;
|
||||
inst->TexSrcUnit = unit;
|
||||
inst->TexSrcIdx = idx;
|
||||
inst->TexSrcTarget = idx;
|
||||
}
|
||||
else if (instMatch.inputs == INPUT_3V_T) {
|
||||
GLubyte unit, idx;
|
||||
|
|
@ -1421,7 +1421,7 @@ Parse_InstructionSequence(struct parse_state *parseState,
|
|||
if (!Parse_TextureImageId(parseState, &unit, &idx))
|
||||
RETURN_ERROR;
|
||||
inst->TexSrcUnit = unit;
|
||||
inst->TexSrcIdx = idx;
|
||||
inst->TexSrcTarget = idx;
|
||||
}
|
||||
else if (instMatch.inputs == INPUT_1V_S) {
|
||||
if (!Parse_PrintInstruction(parseState, inst))
|
||||
|
|
@ -1454,8 +1454,8 @@ _mesa_parse_nv_fragment_program(GLcontext *ctx, GLenum dstTarget,
|
|||
struct fragment_program *program)
|
||||
{
|
||||
struct parse_state parseState;
|
||||
struct fp_instruction instBuffer[MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS];
|
||||
struct fp_instruction *newInst;
|
||||
struct prog_instruction instBuffer[MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS];
|
||||
struct prog_instruction *newInst;
|
||||
GLenum target;
|
||||
GLubyte *programString;
|
||||
|
||||
|
|
@ -1519,14 +1519,14 @@ _mesa_parse_nv_fragment_program(GLcontext *ctx, GLenum dstTarget,
|
|||
|
||||
/* copy the compiled instructions */
|
||||
assert(parseState.numInst <= MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS);
|
||||
newInst = (struct fp_instruction *)
|
||||
MALLOC(parseState.numInst * sizeof(struct fp_instruction));
|
||||
newInst = (struct prog_instruction *)
|
||||
MALLOC(parseState.numInst * sizeof(struct prog_instruction));
|
||||
if (!newInst) {
|
||||
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glLoadProgramNV");
|
||||
return; /* out of memory */
|
||||
}
|
||||
MEMCPY(newInst, instBuffer,
|
||||
parseState.numInst * sizeof(struct fp_instruction));
|
||||
parseState.numInst * sizeof(struct prog_instruction));
|
||||
|
||||
/* install the program */
|
||||
program->Base.Target = target;
|
||||
|
|
@ -1568,7 +1568,7 @@ _mesa_parse_nv_fragment_program(GLcontext *ctx, GLenum dstTarget,
|
|||
|
||||
static void
|
||||
PrintSrcReg(const struct fragment_program *program,
|
||||
const struct fp_src_register *src)
|
||||
const struct prog_src_register *src)
|
||||
{
|
||||
static const char comps[5] = "xyzw";
|
||||
|
||||
|
|
@ -1635,10 +1635,10 @@ PrintSrcReg(const struct fragment_program *program,
|
|||
}
|
||||
|
||||
static void
|
||||
PrintTextureSrc(const struct fp_instruction *inst)
|
||||
PrintTextureSrc(const struct prog_instruction *inst)
|
||||
{
|
||||
_mesa_printf("TEX%d, ", inst->TexSrcUnit);
|
||||
switch (inst->TexSrcIdx) {
|
||||
switch (inst->TexSrcTarget) {
|
||||
case TEXTURE_1D_INDEX:
|
||||
_mesa_printf("1D");
|
||||
break;
|
||||
|
|
@ -1660,7 +1660,7 @@ PrintTextureSrc(const struct fp_instruction *inst)
|
|||
}
|
||||
|
||||
static void
|
||||
PrintCondCode(const struct fp_dst_register *dst)
|
||||
PrintCondCode(const struct prog_dst_register *dst)
|
||||
{
|
||||
static const char *comps = "xyzw";
|
||||
static const char *ccString[] = {
|
||||
|
|
@ -1684,7 +1684,7 @@ PrintCondCode(const struct fp_dst_register *dst)
|
|||
|
||||
|
||||
static void
|
||||
PrintDstReg(const struct fp_dst_register *dst)
|
||||
PrintDstReg(const struct prog_dst_register *dst)
|
||||
{
|
||||
if (dst->File == PROGRAM_OUTPUT) {
|
||||
_mesa_printf("o[%s]", OutputRegisters[dst->Index]);
|
||||
|
|
@ -1732,9 +1732,9 @@ PrintDstReg(const struct fp_dst_register *dst)
|
|||
void
|
||||
_mesa_print_nv_fragment_program(const struct fragment_program *program)
|
||||
{
|
||||
const struct fp_instruction *inst;
|
||||
const struct prog_instruction *inst;
|
||||
|
||||
for (inst = program->Instructions; inst->Opcode != FP_OPCODE_END; inst++) {
|
||||
for (inst = program->Instructions; inst->Opcode != OPCODE_END; inst++) {
|
||||
int i;
|
||||
for (i = 0; Instructions[i].name; i++) {
|
||||
if (inst->Opcode == Instructions[i].opcode) {
|
||||
|
|
@ -1744,7 +1744,7 @@ _mesa_print_nv_fragment_program(const struct fragment_program *program)
|
|||
_mesa_printf("H");
|
||||
else if (inst->Precision == FIXED12)
|
||||
_mesa_printf("X");
|
||||
if (inst->UpdateCondRegister)
|
||||
if (inst->CondUpdate)
|
||||
_mesa_printf("C");
|
||||
if (inst->Saturate)
|
||||
_mesa_printf("_SAT");
|
||||
|
|
@ -1818,24 +1818,3 @@ _mesa_nv_fragment_output_register_name(GLuint i)
|
|||
ASSERT(i < MAX_NV_FRAGMENT_PROGRAM_OUTPUTS);
|
||||
return OutputRegisters[i];
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Initialize fragment program instruction fields to defaults.
|
||||
*/
|
||||
void
|
||||
_mesa_init_fp_instruction(struct fp_instruction *inst)
|
||||
{
|
||||
_mesa_bzero(inst, sizeof(struct fp_instruction));
|
||||
inst->SrcReg[0].File = PROGRAM_UNDEFINED;
|
||||
inst->SrcReg[0].Swizzle = SWIZZLE_NOOP;
|
||||
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
|
||||
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
|
||||
inst->SrcReg[2].File = PROGRAM_UNDEFINED;
|
||||
inst->SrcReg[2].Swizzle = SWIZZLE_NOOP;
|
||||
inst->DstReg.File = PROGRAM_UNDEFINED;
|
||||
inst->DstReg.WriteMask = WRITEMASK_XYZW;
|
||||
inst->DstReg.CondSwizzle = SWIZZLE_NOOP;
|
||||
inst->Precision = FLOAT32;
|
||||
inst->DstReg.CondMask = COND_TR;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,168 +0,0 @@
|
|||
/*
|
||||
* Mesa 3-D graphics library
|
||||
* Version: 6.5
|
||||
*
|
||||
* Copyright (C) 1999-2005 Brian Paul All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
|
||||
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
/* Private fragment program types and constants only used by files
|
||||
* related to fragment programs.
|
||||
*
|
||||
* XXX TO-DO: Rename this file "fragprog.h" since it's not NV-specific.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef NVFRAGPROG_H
|
||||
#define NVFRAGPROG_H
|
||||
|
||||
#include "config.h"
|
||||
#include "mtypes.h"
|
||||
|
||||
|
||||
|
||||
/* condition codes */
|
||||
#define COND_GT 1 /* greater than zero */
|
||||
#define COND_EQ 2 /* equal to zero */
|
||||
#define COND_LT 3 /* less than zero */
|
||||
#define COND_UN 4 /* unordered (NaN) */
|
||||
#define COND_GE 5 /* greater then or equal to zero */
|
||||
#define COND_LE 6 /* less then or equal to zero */
|
||||
#define COND_NE 7 /* not equal to zero */
|
||||
#define COND_TR 8 /* always true */
|
||||
#define COND_FL 9 /* always false */
|
||||
|
||||
|
||||
/* instruction precision */
|
||||
#define FLOAT32 0x1
|
||||
#define FLOAT16 0x2
|
||||
#define FIXED12 0x4
|
||||
|
||||
|
||||
/* Fragment program instruction opcodes */
|
||||
enum fp_opcode {
|
||||
FP_OPCODE_ABS, /* ARB_f_p only */
|
||||
FP_OPCODE_ADD,
|
||||
FP_OPCODE_CMP, /* ARB_f_p only */
|
||||
FP_OPCODE_COS,
|
||||
FP_OPCODE_DDX, /* NV_f_p only */
|
||||
FP_OPCODE_DDY, /* NV_f_p only */
|
||||
FP_OPCODE_DP3,
|
||||
FP_OPCODE_DP4,
|
||||
FP_OPCODE_DPH, /* ARB_f_p only */
|
||||
FP_OPCODE_DST,
|
||||
FP_OPCODE_END, /* private opcode */
|
||||
FP_OPCODE_EX2,
|
||||
FP_OPCODE_FLR,
|
||||
FP_OPCODE_FRC,
|
||||
FP_OPCODE_KIL, /* ARB_f_p only */
|
||||
FP_OPCODE_KIL_NV, /* NV_f_p only */
|
||||
FP_OPCODE_LG2,
|
||||
FP_OPCODE_LIT,
|
||||
FP_OPCODE_LRP,
|
||||
FP_OPCODE_MAD,
|
||||
FP_OPCODE_MAX,
|
||||
FP_OPCODE_MIN,
|
||||
FP_OPCODE_MOV,
|
||||
FP_OPCODE_MUL,
|
||||
FP_OPCODE_PK2H, /* NV_f_p only */
|
||||
FP_OPCODE_PK2US, /* NV_f_p only */
|
||||
FP_OPCODE_PK4B, /* NV_f_p only */
|
||||
FP_OPCODE_PK4UB, /* NV_f_p only */
|
||||
FP_OPCODE_POW,
|
||||
FP_OPCODE_PRINT, /* Mesa only */
|
||||
FP_OPCODE_RCP,
|
||||
FP_OPCODE_RFL, /* NV_f_p only */
|
||||
FP_OPCODE_RSQ,
|
||||
FP_OPCODE_SCS, /* ARB_f_p only */
|
||||
FP_OPCODE_SEQ, /* NV_f_p only */
|
||||
FP_OPCODE_SFL, /* NV_f_p only */
|
||||
FP_OPCODE_SGE, /* NV_f_p only */
|
||||
FP_OPCODE_SGT, /* NV_f_p only */
|
||||
FP_OPCODE_SIN,
|
||||
FP_OPCODE_SLE, /* NV_f_p only */
|
||||
FP_OPCODE_SLT,
|
||||
FP_OPCODE_SNE, /* NV_f_p only */
|
||||
FP_OPCODE_STR, /* NV_f_p only */
|
||||
FP_OPCODE_SUB,
|
||||
FP_OPCODE_SWZ, /* ARB_f_p only */
|
||||
FP_OPCODE_TEX,
|
||||
FP_OPCODE_TXB, /* ARB_f_p only */
|
||||
FP_OPCODE_TXD, /* NV_f_p only */
|
||||
FP_OPCODE_TXP, /* ARB_f_p only */
|
||||
FP_OPCODE_TXP_NV, /* NV_f_p only */
|
||||
FP_OPCODE_UP2H, /* NV_f_p only */
|
||||
FP_OPCODE_UP2US, /* NV_f_p only */
|
||||
FP_OPCODE_UP4B, /* NV_f_p only */
|
||||
FP_OPCODE_UP4UB, /* NV_f_p only */
|
||||
FP_OPCODE_X2D, /* NV_f_p only - 2d mat mul */
|
||||
FP_OPCODE_XPD /* ARB_f_p only - cross product */
|
||||
};
|
||||
|
||||
|
||||
/* Instruction source register */
|
||||
struct fp_src_register
|
||||
{
|
||||
GLuint File:4;
|
||||
GLuint Index:8;
|
||||
GLuint Swizzle:12;
|
||||
GLuint NegateBase:4; /* ARB: negate/extended negate, per component.
|
||||
NV: negate before absolute value? */
|
||||
GLuint Abs:1; /* NV: take absolute value (all components) ? */
|
||||
GLuint NegateAbs:1; /* NV: negate (all components) after absolute value? */
|
||||
};
|
||||
|
||||
|
||||
/* Instruction destination register */
|
||||
struct fp_dst_register
|
||||
{
|
||||
GLuint File:4;
|
||||
GLuint Index:8;
|
||||
GLuint WriteMask:4;
|
||||
GLuint CondMask:4; /* NV: enough bits? */
|
||||
GLuint CondSwizzle:12; /* NV: enough bits? */
|
||||
};
|
||||
|
||||
|
||||
/* Fragment program instruction */
|
||||
struct fp_instruction
|
||||
{
|
||||
GLuint Opcode:6;
|
||||
GLuint Saturate:1;
|
||||
GLuint UpdateCondRegister:1; /* NV */
|
||||
GLuint Precision:2; /* NV: unused/unneeded? */
|
||||
GLuint TexSrcUnit:4; /* texture unit for TEX, TXD, TXP instructions */
|
||||
GLuint TexSrcIdx:3; /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
|
||||
|
||||
#if FEATURE_MESA_program_debug
|
||||
GLint StringPos:15; /* enough bits? */
|
||||
#endif
|
||||
|
||||
void *Data; /* some arbitrary data, only used for PRINT instruction now */
|
||||
struct fp_src_register SrcReg[3];
|
||||
struct fp_dst_register DstReg;
|
||||
};
|
||||
|
||||
|
||||
extern void
|
||||
_mesa_init_fp_instruction(struct fp_instruction *inst);
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -44,10 +44,9 @@
|
|||
#include "macros.h"
|
||||
#include "mtypes.h"
|
||||
#include "nvfragparse.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "nvvertexec.h"
|
||||
#include "nvvertparse.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "nvprogram.h"
|
||||
#include "program.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
#include "macros.h"
|
||||
#include "mtypes.h"
|
||||
#include "nvvertexec.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "program.h"
|
||||
#include "math/m_matrix.h"
|
||||
|
||||
|
|
@ -227,7 +227,7 @@ _mesa_dump_vp_state( const struct gl_vertex_program_state *state )
|
|||
* source register.
|
||||
*/
|
||||
static INLINE const GLfloat *
|
||||
get_register_pointer( const struct vp_src_register *source,
|
||||
get_register_pointer( const struct prog_src_register *source,
|
||||
const struct gl_vertex_program_state *state )
|
||||
{
|
||||
if (source->RelAddr) {
|
||||
|
|
@ -277,13 +277,13 @@ get_register_pointer( const struct vp_src_register *source,
|
|||
* Apply swizzling and negating as needed.
|
||||
*/
|
||||
static INLINE void
|
||||
fetch_vector4( const struct vp_src_register *source,
|
||||
fetch_vector4( const struct prog_src_register *source,
|
||||
const struct gl_vertex_program_state *state,
|
||||
GLfloat result[4] )
|
||||
{
|
||||
const GLfloat *src = get_register_pointer(source, state);
|
||||
|
||||
if (source->Negate) {
|
||||
if (source->NegateBase) {
|
||||
result[0] = -src[GET_SWZ(source->Swizzle, 0)];
|
||||
result[1] = -src[GET_SWZ(source->Swizzle, 1)];
|
||||
result[2] = -src[GET_SWZ(source->Swizzle, 2)];
|
||||
|
|
@ -303,13 +303,13 @@ fetch_vector4( const struct vp_src_register *source,
|
|||
* As above, but only return result[0] element.
|
||||
*/
|
||||
static INLINE void
|
||||
fetch_vector1( const struct vp_src_register *source,
|
||||
fetch_vector1( const struct prog_src_register *source,
|
||||
const struct gl_vertex_program_state *state,
|
||||
GLfloat result[4] )
|
||||
{
|
||||
const GLfloat *src = get_register_pointer(source, state);
|
||||
|
||||
if (source->Negate) {
|
||||
if (source->NegateBase) {
|
||||
result[0] = -src[GET_SWZ(source->Swizzle, 0)];
|
||||
}
|
||||
else {
|
||||
|
|
@ -322,7 +322,7 @@ fetch_vector1( const struct vp_src_register *source,
|
|||
* Store 4 floats into a register.
|
||||
*/
|
||||
static void
|
||||
store_vector4( const struct vp_dst_register *dest,
|
||||
store_vector4( const struct prog_dst_register *dest,
|
||||
struct gl_vertex_program_state *state,
|
||||
const GLfloat value[4] )
|
||||
{
|
||||
|
|
@ -382,7 +382,7 @@ void
|
|||
_mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
||||
{
|
||||
struct gl_vertex_program_state *state = &ctx->VertexProgram;
|
||||
const struct vp_instruction *inst;
|
||||
const struct prog_instruction *inst;
|
||||
|
||||
ctx->_CurrentProgram = GL_VERTEX_PROGRAM_ARB; /* or NV, doesn't matter */
|
||||
|
||||
|
|
@ -407,14 +407,14 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
}
|
||||
|
||||
switch (inst->Opcode) {
|
||||
case VP_OPCODE_MOV:
|
||||
case OPCODE_MOV:
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_LIT:
|
||||
case OPCODE_LIT:
|
||||
{
|
||||
const GLfloat epsilon = 1.0F / 256.0F; /* per NV spec */
|
||||
GLfloat t[4], lit[4];
|
||||
|
|
@ -429,7 +429,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, lit );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_RCP:
|
||||
case OPCODE_RCP:
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector1( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -439,7 +439,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_RSQ:
|
||||
case OPCODE_RSQ:
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector1( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -448,7 +448,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_EXP:
|
||||
case OPCODE_EXP:
|
||||
{
|
||||
GLfloat t[4], q[4], floor_t0;
|
||||
fetch_vector1( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -477,7 +477,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, q );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_LOG:
|
||||
case OPCODE_LOG:
|
||||
{
|
||||
GLfloat t[4], q[4], abs_t0;
|
||||
fetch_vector1( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -514,7 +514,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, q );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_MUL:
|
||||
case OPCODE_MUL:
|
||||
{
|
||||
GLfloat t[4], u[4], prod[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -526,7 +526,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, prod );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_ADD:
|
||||
case OPCODE_ADD:
|
||||
{
|
||||
GLfloat t[4], u[4], sum[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -538,7 +538,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, sum );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_DP3:
|
||||
case OPCODE_DP3:
|
||||
{
|
||||
GLfloat t[4], u[4], dot[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -548,7 +548,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, dot );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_DP4:
|
||||
case OPCODE_DP4:
|
||||
{
|
||||
GLfloat t[4], u[4], dot[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -558,7 +558,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, dot );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_DST:
|
||||
case OPCODE_DST:
|
||||
{
|
||||
GLfloat t[4], u[4], dst[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -570,7 +570,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, dst );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_MIN:
|
||||
case OPCODE_MIN:
|
||||
{
|
||||
GLfloat t[4], u[4], min[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -582,7 +582,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, min );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_MAX:
|
||||
case OPCODE_MAX:
|
||||
{
|
||||
GLfloat t[4], u[4], max[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -594,7 +594,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, max );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_SLT:
|
||||
case OPCODE_SLT:
|
||||
{
|
||||
GLfloat t[4], u[4], slt[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -606,7 +606,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, slt );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_SGE:
|
||||
case OPCODE_SGE:
|
||||
{
|
||||
GLfloat t[4], u[4], sge[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -618,7 +618,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, sge );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_MAD:
|
||||
case OPCODE_MAD:
|
||||
{
|
||||
GLfloat t[4], u[4], v[4], sum[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -631,14 +631,14 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, sum );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_ARL:
|
||||
case OPCODE_ARL:
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
state->AddressReg[0] = (GLint) FLOORF(t[0]);
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_DPH:
|
||||
case OPCODE_DPH:
|
||||
{
|
||||
GLfloat t[4], u[4], dot[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -648,7 +648,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, dot );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_RCC:
|
||||
case OPCODE_RCC:
|
||||
{
|
||||
GLfloat t[4], u;
|
||||
fetch_vector1( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -676,7 +676,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_SUB: /* GL_NV_vertex_program1_1 */
|
||||
case OPCODE_SUB: /* GL_NV_vertex_program1_1 */
|
||||
{
|
||||
GLfloat t[4], u[4], sum[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -688,7 +688,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, sum );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_ABS: /* GL_NV_vertex_program1_1 */
|
||||
case OPCODE_ABS: /* GL_NV_vertex_program1_1 */
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -699,7 +699,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_FLR: /* GL_ARB_vertex_program */
|
||||
case OPCODE_FLR: /* GL_ARB_vertex_program */
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -710,7 +710,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_FRC: /* GL_ARB_vertex_program */
|
||||
case OPCODE_FRC: /* GL_ARB_vertex_program */
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -721,7 +721,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_EX2: /* GL_ARB_vertex_program */
|
||||
case OPCODE_EX2: /* GL_ARB_vertex_program */
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector1( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -729,7 +729,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_LG2: /* GL_ARB_vertex_program */
|
||||
case OPCODE_LG2: /* GL_ARB_vertex_program */
|
||||
{
|
||||
GLfloat t[4];
|
||||
fetch_vector1( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -737,7 +737,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_POW: /* GL_ARB_vertex_program */
|
||||
case OPCODE_POW: /* GL_ARB_vertex_program */
|
||||
{
|
||||
GLfloat t[4], u[4];
|
||||
fetch_vector1( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -746,7 +746,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, t );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_XPD: /* GL_ARB_vertex_program */
|
||||
case OPCODE_XPD: /* GL_ARB_vertex_program */
|
||||
{
|
||||
GLfloat t[4], u[4], cross[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -757,9 +757,9 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
store_vector4( &inst->DstReg, state, cross );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_SWZ: /* GL_ARB_vertex_program */
|
||||
case OPCODE_SWZ: /* GL_ARB_vertex_program */
|
||||
{
|
||||
const struct vp_src_register *source = &inst->SrcReg[0];
|
||||
const struct prog_src_register *source = &inst->SrcReg[0];
|
||||
const GLfloat *src = get_register_pointer(source, state);
|
||||
GLfloat result[4];
|
||||
GLuint i;
|
||||
|
|
@ -772,13 +772,13 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
result[i] = 1.0;
|
||||
else
|
||||
result[i] = src[GET_SWZ(source->Swizzle, i)];
|
||||
if (source->Negate & (1 << i))
|
||||
if (source->NegateBase & (1 << i))
|
||||
result[i] = -result[i];
|
||||
}
|
||||
store_vector4( &inst->DstReg, state, result );
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_PRINT:
|
||||
case OPCODE_PRINT:
|
||||
if (inst->SrcReg[0].File) {
|
||||
GLfloat t[4];
|
||||
fetch_vector4( &inst->SrcReg[0], state, t );
|
||||
|
|
@ -789,7 +789,7 @@ _mesa_exec_vertex_program(GLcontext *ctx, const struct vertex_program *program)
|
|||
_mesa_printf("%s\n", (char *) inst->Data);
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_END:
|
||||
case OPCODE_END:
|
||||
ctx->_CurrentProgram = 0;
|
||||
return;
|
||||
default:
|
||||
|
|
@ -818,7 +818,7 @@ masking, relative addressing, etc. when they're not needed.
|
|||
|
||||
For example:
|
||||
|
||||
void simple_add( struct vp_instruction *inst )
|
||||
void simple_add( struct prog_instruction *inst )
|
||||
{
|
||||
GLfloat *sum = machine->Registers[inst->DstReg.Register];
|
||||
GLfloat *a = machine->Registers[inst->SrcReg[0].Register];
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
/*
|
||||
* Mesa 3-D graphics library
|
||||
* Version: 6.3
|
||||
* Version: 6.5
|
||||
*
|
||||
* Copyright (C) 1999-2004 Brian Paul All Rights Reserved.
|
||||
* Copyright (C) 1999-2005 Brian Paul All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
|
|
@ -45,7 +45,7 @@
|
|||
#include "mtypes.h"
|
||||
#include "nvprogram.h"
|
||||
#include "nvvertparse.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "program.h"
|
||||
|
||||
|
||||
|
|
@ -293,7 +293,7 @@ static const char *OutputRegisters[MAX_NV_VERTEX_PROGRAM_OUTPUTS + 1] = {
|
|||
"PSIZ", "BFC0", "BFC1", NULL
|
||||
};
|
||||
|
||||
/* NOTE: the order here must match opcodes in nvvertprog.h */
|
||||
/* NOTE: the order here must match opcodes in program_instruction.h */
|
||||
static const char *Opcodes[] = {
|
||||
"MOV", "LIT", "RCP", "RSQ", "EXP", "LOG", "MUL", "ADD", "DP3", "DP4",
|
||||
"DST", "MIN", "MAX", "SLT", "SGE", "MAD", "ARL", "DPH", "RCC", "SUB",
|
||||
|
|
@ -393,7 +393,7 @@ Parse_AbsParamReg(struct parse_state *parseState, GLint *regNum)
|
|||
|
||||
|
||||
static GLboolean
|
||||
Parse_ParamReg(struct parse_state *parseState, struct vp_src_register *srcReg)
|
||||
Parse_ParamReg(struct parse_state *parseState, struct prog_src_register *srcReg)
|
||||
{
|
||||
GLubyte token[100];
|
||||
|
||||
|
|
@ -561,7 +561,7 @@ Parse_OutputReg(struct parse_state *parseState, GLint *outputRegNum)
|
|||
|
||||
|
||||
static GLboolean
|
||||
Parse_MaskedDstReg(struct parse_state *parseState, struct vp_dst_register *dstReg)
|
||||
Parse_MaskedDstReg(struct parse_state *parseState, struct prog_dst_register *dstReg)
|
||||
{
|
||||
GLubyte token[100];
|
||||
GLint idx;
|
||||
|
|
@ -642,7 +642,7 @@ Parse_MaskedDstReg(struct parse_state *parseState, struct vp_dst_register *dstRe
|
|||
|
||||
|
||||
static GLboolean
|
||||
Parse_SwizzleSrcReg(struct parse_state *parseState, struct vp_src_register *srcReg)
|
||||
Parse_SwizzleSrcReg(struct parse_state *parseState, struct prog_src_register *srcReg)
|
||||
{
|
||||
GLubyte token[100];
|
||||
GLint idx;
|
||||
|
|
@ -654,12 +654,12 @@ Parse_SwizzleSrcReg(struct parse_state *parseState, struct vp_src_register *srcR
|
|||
RETURN_ERROR;
|
||||
if (token[0] == '-') {
|
||||
(void) Parse_String(parseState, "-");
|
||||
srcReg->Negate = GL_TRUE;
|
||||
srcReg->NegateBase = GL_TRUE;
|
||||
if (!Peek_Token(parseState, token))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else {
|
||||
srcReg->Negate = GL_FALSE;
|
||||
srcReg->NegateBase = GL_FALSE;
|
||||
}
|
||||
|
||||
/* Src reg can be R<n>, c[n], c[n +/- offset], or a named vertex attrib */
|
||||
|
|
@ -733,7 +733,7 @@ Parse_SwizzleSrcReg(struct parse_state *parseState, struct vp_src_register *srcR
|
|||
|
||||
|
||||
static GLboolean
|
||||
Parse_ScalarSrcReg(struct parse_state *parseState, struct vp_src_register *srcReg)
|
||||
Parse_ScalarSrcReg(struct parse_state *parseState, struct prog_src_register *srcReg)
|
||||
{
|
||||
GLubyte token[100];
|
||||
GLint idx;
|
||||
|
|
@ -744,13 +744,13 @@ Parse_ScalarSrcReg(struct parse_state *parseState, struct vp_src_register *srcRe
|
|||
if (!Peek_Token(parseState, token))
|
||||
RETURN_ERROR;
|
||||
if (token[0] == '-') {
|
||||
srcReg->Negate = GL_TRUE;
|
||||
srcReg->NegateBase = GL_TRUE;
|
||||
(void) Parse_String(parseState, "-"); /* consume '-' */
|
||||
if (!Peek_Token(parseState, token))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else {
|
||||
srcReg->Negate = GL_FALSE;
|
||||
srcReg->NegateBase = GL_FALSE;
|
||||
}
|
||||
|
||||
/* Src reg can be R<n>, c[n], c[n +/- offset], or a named vertex attrib */
|
||||
|
|
@ -803,9 +803,10 @@ Parse_ScalarSrcReg(struct parse_state *parseState, struct vp_src_register *srcRe
|
|||
|
||||
static GLint
|
||||
Parse_UnaryOpInstruction(struct parse_state *parseState,
|
||||
struct vp_instruction *inst, enum vp_opcode opcode)
|
||||
struct prog_instruction *inst,
|
||||
enum prog_opcode opcode)
|
||||
{
|
||||
if (opcode == VP_OPCODE_ABS && !parseState->isVersion1_1)
|
||||
if (opcode == OPCODE_ABS && !parseState->isVersion1_1)
|
||||
RETURN_ERROR1("ABS illegal for vertex program 1.0");
|
||||
|
||||
inst->Opcode = opcode;
|
||||
|
|
@ -833,11 +834,12 @@ Parse_UnaryOpInstruction(struct parse_state *parseState,
|
|||
|
||||
static GLboolean
|
||||
Parse_BiOpInstruction(struct parse_state *parseState,
|
||||
struct vp_instruction *inst, enum vp_opcode opcode)
|
||||
struct prog_instruction *inst,
|
||||
enum prog_opcode opcode)
|
||||
{
|
||||
if (opcode == VP_OPCODE_DPH && !parseState->isVersion1_1)
|
||||
if (opcode == OPCODE_DPH && !parseState->isVersion1_1)
|
||||
RETURN_ERROR1("DPH illegal for vertex program 1.0");
|
||||
if (opcode == VP_OPCODE_SUB && !parseState->isVersion1_1)
|
||||
if (opcode == OPCODE_SUB && !parseState->isVersion1_1)
|
||||
RETURN_ERROR1("SUB illegal for vertex program 1.0");
|
||||
|
||||
inst->Opcode = opcode;
|
||||
|
|
@ -885,7 +887,8 @@ Parse_BiOpInstruction(struct parse_state *parseState,
|
|||
|
||||
static GLboolean
|
||||
Parse_TriOpInstruction(struct parse_state *parseState,
|
||||
struct vp_instruction *inst, enum vp_opcode opcode)
|
||||
struct prog_instruction *inst,
|
||||
enum prog_opcode opcode)
|
||||
{
|
||||
inst->Opcode = opcode;
|
||||
inst->StringPos = parseState->curLine - parseState->start;
|
||||
|
|
@ -952,9 +955,10 @@ Parse_TriOpInstruction(struct parse_state *parseState,
|
|||
|
||||
static GLboolean
|
||||
Parse_ScalarInstruction(struct parse_state *parseState,
|
||||
struct vp_instruction *inst, enum vp_opcode opcode)
|
||||
struct prog_instruction *inst,
|
||||
enum prog_opcode opcode)
|
||||
{
|
||||
if (opcode == VP_OPCODE_RCC && !parseState->isVersion1_1)
|
||||
if (opcode == OPCODE_RCC && !parseState->isVersion1_1)
|
||||
RETURN_ERROR1("RCC illegal for vertex program 1.0");
|
||||
|
||||
inst->Opcode = opcode;
|
||||
|
|
@ -981,9 +985,9 @@ Parse_ScalarInstruction(struct parse_state *parseState,
|
|||
|
||||
|
||||
static GLboolean
|
||||
Parse_AddressInstruction(struct parse_state *parseState, struct vp_instruction *inst)
|
||||
Parse_AddressInstruction(struct parse_state *parseState, struct prog_instruction *inst)
|
||||
{
|
||||
inst->Opcode = VP_OPCODE_ARL;
|
||||
inst->Opcode = OPCODE_ARL;
|
||||
inst->StringPos = parseState->curLine - parseState->start;
|
||||
|
||||
/* dest A0 reg */
|
||||
|
|
@ -1007,11 +1011,11 @@ Parse_AddressInstruction(struct parse_state *parseState, struct vp_instruction *
|
|||
|
||||
|
||||
static GLboolean
|
||||
Parse_EndInstruction(struct parse_state *parseState, struct vp_instruction *inst)
|
||||
Parse_EndInstruction(struct parse_state *parseState, struct prog_instruction *inst)
|
||||
{
|
||||
GLubyte token[100];
|
||||
|
||||
inst->Opcode = VP_OPCODE_END;
|
||||
inst->Opcode = OPCODE_END;
|
||||
inst->StringPos = parseState->curLine - parseState->start;
|
||||
|
||||
/* this should fail! */
|
||||
|
|
@ -1036,16 +1040,16 @@ Parse_EndInstruction(struct parse_state *parseState, struct vp_instruction *inst
|
|||
* | "PRINT" <string literal> "," <dstReg>
|
||||
*/
|
||||
static GLboolean
|
||||
Parse_PrintInstruction(struct parse_state *parseState, struct vp_instruction *inst)
|
||||
Parse_PrintInstruction(struct parse_state *parseState, struct prog_instruction *inst)
|
||||
{
|
||||
const GLubyte *str;
|
||||
GLubyte *msg;
|
||||
GLuint len;
|
||||
GLubyte token[100];
|
||||
struct vp_src_register *srcReg = &inst->SrcReg[0];
|
||||
struct prog_src_register *srcReg = &inst->SrcReg[0];
|
||||
GLint idx;
|
||||
|
||||
inst->Opcode = VP_OPCODE_PRINT;
|
||||
inst->Opcode = OPCODE_PRINT;
|
||||
inst->StringPos = parseState->curLine - parseState->start;
|
||||
|
||||
/* The first argument is a literal string 'just like this' */
|
||||
|
|
@ -1070,7 +1074,7 @@ Parse_PrintInstruction(struct parse_state *parseState, struct vp_instruction *in
|
|||
RETURN_ERROR;
|
||||
|
||||
srcReg->RelAddr = GL_FALSE;
|
||||
srcReg->Negate = GL_FALSE;
|
||||
srcReg->NegateBase = GL_FALSE;
|
||||
srcReg->Swizzle = SWIZZLE_NOOP;
|
||||
|
||||
/* Register can be R<n>, c[n], c[n +/- offset], a named vertex attrib,
|
||||
|
|
@ -1117,7 +1121,7 @@ Parse_PrintInstruction(struct parse_state *parseState, struct vp_instruction *in
|
|||
|
||||
static GLboolean
|
||||
Parse_OptionSequence(struct parse_state *parseState,
|
||||
struct vp_instruction program[])
|
||||
struct prog_instruction program[])
|
||||
{
|
||||
(void) program;
|
||||
while (1) {
|
||||
|
|
@ -1137,92 +1141,92 @@ Parse_OptionSequence(struct parse_state *parseState,
|
|||
|
||||
static GLboolean
|
||||
Parse_InstructionSequence(struct parse_state *parseState,
|
||||
struct vp_instruction program[])
|
||||
struct prog_instruction program[])
|
||||
{
|
||||
while (1) {
|
||||
struct vp_instruction *inst = program + parseState->numInst;
|
||||
struct prog_instruction *inst = program + parseState->numInst;
|
||||
|
||||
/* Initialize the instruction */
|
||||
_mesa_init_vp_instruction(inst);
|
||||
_mesa_init_instruction(inst);
|
||||
|
||||
if (Parse_String(parseState, "MOV")) {
|
||||
if (!Parse_UnaryOpInstruction(parseState, inst, VP_OPCODE_MOV))
|
||||
if (!Parse_UnaryOpInstruction(parseState, inst, OPCODE_MOV))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "LIT")) {
|
||||
if (!Parse_UnaryOpInstruction(parseState, inst, VP_OPCODE_LIT))
|
||||
if (!Parse_UnaryOpInstruction(parseState, inst, OPCODE_LIT))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "ABS")) {
|
||||
if (!Parse_UnaryOpInstruction(parseState, inst, VP_OPCODE_ABS))
|
||||
if (!Parse_UnaryOpInstruction(parseState, inst, OPCODE_ABS))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "MUL")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_MUL))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_MUL))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "ADD")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_ADD))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_ADD))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "DP3")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_DP3))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_DP3))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "DP4")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_DP4))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_DP4))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "DST")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_DST))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_DST))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "MIN")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_MIN))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_MIN))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "MAX")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_MAX))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_MAX))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "SLT")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_SLT))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_SLT))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "SGE")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_SGE))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_SGE))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "DPH")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_DPH))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_DPH))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "SUB")) {
|
||||
if (!Parse_BiOpInstruction(parseState, inst, VP_OPCODE_SUB))
|
||||
if (!Parse_BiOpInstruction(parseState, inst, OPCODE_SUB))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "MAD")) {
|
||||
if (!Parse_TriOpInstruction(parseState, inst, VP_OPCODE_MAD))
|
||||
if (!Parse_TriOpInstruction(parseState, inst, OPCODE_MAD))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "RCP")) {
|
||||
if (!Parse_ScalarInstruction(parseState, inst, VP_OPCODE_RCP))
|
||||
if (!Parse_ScalarInstruction(parseState, inst, OPCODE_RCP))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "RSQ")) {
|
||||
if (!Parse_ScalarInstruction(parseState, inst, VP_OPCODE_RSQ))
|
||||
if (!Parse_ScalarInstruction(parseState, inst, OPCODE_RSQ))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "EXP")) {
|
||||
if (!Parse_ScalarInstruction(parseState, inst, VP_OPCODE_EXP))
|
||||
if (!Parse_ScalarInstruction(parseState, inst, OPCODE_EXP))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "LOG")) {
|
||||
if (!Parse_ScalarInstruction(parseState, inst, VP_OPCODE_LOG))
|
||||
if (!Parse_ScalarInstruction(parseState, inst, OPCODE_LOG))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "RCC")) {
|
||||
if (!Parse_ScalarInstruction(parseState, inst, VP_OPCODE_RCC))
|
||||
if (!Parse_ScalarInstruction(parseState, inst, OPCODE_RCC))
|
||||
RETURN_ERROR;
|
||||
}
|
||||
else if (Parse_String(parseState, "ARL")) {
|
||||
|
|
@ -1271,7 +1275,7 @@ Parse_InstructionSequence(struct parse_state *parseState,
|
|||
|
||||
static GLboolean
|
||||
Parse_Program(struct parse_state *parseState,
|
||||
struct vp_instruction instBuffer[])
|
||||
struct prog_instruction instBuffer[])
|
||||
{
|
||||
if (parseState->isVersion1_1) {
|
||||
if (!Parse_OptionSequence(parseState, instBuffer)) {
|
||||
|
|
@ -1293,8 +1297,8 @@ _mesa_parse_nv_vertex_program(GLcontext *ctx, GLenum dstTarget,
|
|||
struct vertex_program *program)
|
||||
{
|
||||
struct parse_state parseState;
|
||||
struct vp_instruction instBuffer[MAX_NV_VERTEX_PROGRAM_INSTRUCTIONS];
|
||||
struct vp_instruction *newInst;
|
||||
struct prog_instruction instBuffer[MAX_NV_VERTEX_PROGRAM_INSTRUCTIONS];
|
||||
struct prog_instruction *newInst;
|
||||
GLenum target;
|
||||
GLubyte *programString;
|
||||
|
||||
|
|
@ -1374,15 +1378,15 @@ _mesa_parse_nv_vertex_program(GLcontext *ctx, GLenum dstTarget,
|
|||
|
||||
/* copy the compiled instructions */
|
||||
assert(parseState.numInst <= MAX_NV_VERTEX_PROGRAM_INSTRUCTIONS);
|
||||
newInst = (struct vp_instruction *)
|
||||
MALLOC(parseState.numInst * sizeof(struct vp_instruction));
|
||||
newInst = (struct prog_instruction *)
|
||||
MALLOC(parseState.numInst * sizeof(struct prog_instruction));
|
||||
if (!newInst) {
|
||||
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glLoadProgramNV");
|
||||
FREE(programString);
|
||||
return; /* out of memory */
|
||||
}
|
||||
MEMCPY(newInst, instBuffer,
|
||||
parseState.numInst * sizeof(struct vp_instruction));
|
||||
parseState.numInst * sizeof(struct prog_instruction));
|
||||
|
||||
/* install the program */
|
||||
program->Base.Target = target;
|
||||
|
|
@ -1419,10 +1423,10 @@ _mesa_parse_nv_vertex_program(GLcontext *ctx, GLenum dstTarget,
|
|||
|
||||
|
||||
static void
|
||||
PrintSrcReg(const struct vp_src_register *src)
|
||||
PrintSrcReg(const struct prog_src_register *src)
|
||||
{
|
||||
static const char comps[5] = "xyzw";
|
||||
if (src->Negate)
|
||||
if (src->NegateBase)
|
||||
_mesa_printf("-");
|
||||
if (src->RelAddr) {
|
||||
if (src->Index > 0)
|
||||
|
|
@ -1462,7 +1466,7 @@ PrintSrcReg(const struct vp_src_register *src)
|
|||
|
||||
|
||||
static void
|
||||
PrintDstReg(const struct vp_dst_register *dst)
|
||||
PrintDstReg(const struct prog_dst_register *dst)
|
||||
{
|
||||
if (dst->File == PROGRAM_OUTPUT) {
|
||||
_mesa_printf("o[%s]", OutputRegisters[dst->Index]);
|
||||
|
|
@ -1496,34 +1500,34 @@ PrintDstReg(const struct vp_dst_register *dst)
|
|||
* Print a single NVIDIA vertex program instruction.
|
||||
*/
|
||||
void
|
||||
_mesa_print_nv_vertex_instruction(const struct vp_instruction *inst)
|
||||
_mesa_print_nv_vertex_instruction(const struct prog_instruction *inst)
|
||||
{
|
||||
switch (inst->Opcode) {
|
||||
case VP_OPCODE_MOV:
|
||||
case VP_OPCODE_LIT:
|
||||
case VP_OPCODE_RCP:
|
||||
case VP_OPCODE_RSQ:
|
||||
case VP_OPCODE_EXP:
|
||||
case VP_OPCODE_LOG:
|
||||
case VP_OPCODE_RCC:
|
||||
case VP_OPCODE_ABS:
|
||||
case OPCODE_MOV:
|
||||
case OPCODE_LIT:
|
||||
case OPCODE_RCP:
|
||||
case OPCODE_RSQ:
|
||||
case OPCODE_EXP:
|
||||
case OPCODE_LOG:
|
||||
case OPCODE_RCC:
|
||||
case OPCODE_ABS:
|
||||
_mesa_printf("%s ", Opcodes[(int) inst->Opcode]);
|
||||
PrintDstReg(&inst->DstReg);
|
||||
_mesa_printf(", ");
|
||||
PrintSrcReg(&inst->SrcReg[0]);
|
||||
_mesa_printf(";\n");
|
||||
break;
|
||||
case VP_OPCODE_MUL:
|
||||
case VP_OPCODE_ADD:
|
||||
case VP_OPCODE_DP3:
|
||||
case VP_OPCODE_DP4:
|
||||
case VP_OPCODE_DST:
|
||||
case VP_OPCODE_MIN:
|
||||
case VP_OPCODE_MAX:
|
||||
case VP_OPCODE_SLT:
|
||||
case VP_OPCODE_SGE:
|
||||
case VP_OPCODE_DPH:
|
||||
case VP_OPCODE_SUB:
|
||||
case OPCODE_MUL:
|
||||
case OPCODE_ADD:
|
||||
case OPCODE_DP3:
|
||||
case OPCODE_DP4:
|
||||
case OPCODE_DST:
|
||||
case OPCODE_MIN:
|
||||
case OPCODE_MAX:
|
||||
case OPCODE_SLT:
|
||||
case OPCODE_SGE:
|
||||
case OPCODE_DPH:
|
||||
case OPCODE_SUB:
|
||||
_mesa_printf("%s ", Opcodes[(int) inst->Opcode]);
|
||||
PrintDstReg(&inst->DstReg);
|
||||
_mesa_printf(", ");
|
||||
|
|
@ -1532,7 +1536,7 @@ _mesa_print_nv_vertex_instruction(const struct vp_instruction *inst)
|
|||
PrintSrcReg(&inst->SrcReg[1]);
|
||||
_mesa_printf(";\n");
|
||||
break;
|
||||
case VP_OPCODE_MAD:
|
||||
case OPCODE_MAD:
|
||||
_mesa_printf("MAD ");
|
||||
PrintDstReg(&inst->DstReg);
|
||||
_mesa_printf(", ");
|
||||
|
|
@ -1543,12 +1547,12 @@ _mesa_print_nv_vertex_instruction(const struct vp_instruction *inst)
|
|||
PrintSrcReg(&inst->SrcReg[2]);
|
||||
_mesa_printf(";\n");
|
||||
break;
|
||||
case VP_OPCODE_ARL:
|
||||
case OPCODE_ARL:
|
||||
_mesa_printf("ARL A0.x, ");
|
||||
PrintSrcReg(&inst->SrcReg[0]);
|
||||
_mesa_printf(";\n");
|
||||
break;
|
||||
case VP_OPCODE_PRINT:
|
||||
case OPCODE_PRINT:
|
||||
_mesa_printf("PRINT '%s'", inst->Data);
|
||||
if (inst->SrcReg[0].File) {
|
||||
_mesa_printf(", ");
|
||||
|
|
@ -1559,7 +1563,7 @@ _mesa_print_nv_vertex_instruction(const struct vp_instruction *inst)
|
|||
_mesa_printf("\n");
|
||||
}
|
||||
break;
|
||||
case VP_OPCODE_END:
|
||||
case OPCODE_END:
|
||||
_mesa_printf("END\n");
|
||||
break;
|
||||
default:
|
||||
|
|
@ -1574,11 +1578,11 @@ _mesa_print_nv_vertex_instruction(const struct vp_instruction *inst)
|
|||
void
|
||||
_mesa_print_nv_vertex_program(const struct vertex_program *program)
|
||||
{
|
||||
const struct vp_instruction *inst;
|
||||
const struct prog_instruction *inst;
|
||||
|
||||
for (inst = program->Instructions; ; inst++) {
|
||||
_mesa_print_nv_vertex_instruction(inst);
|
||||
if (inst->Opcode == VP_OPCODE_END)
|
||||
if (inst->Opcode == OPCODE_END)
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
|
@ -1601,19 +1605,24 @@ _mesa_nv_vertex_output_register_name(GLuint i)
|
|||
|
||||
|
||||
/**
|
||||
* Initialize vertex program instruction fields to defaults.
|
||||
* Initialize program instruction fields to defaults.
|
||||
*/
|
||||
void
|
||||
_mesa_init_vp_instruction(struct vp_instruction *inst)
|
||||
_mesa_init_instruction(struct prog_instruction *inst)
|
||||
{
|
||||
_mesa_bzero(inst, sizeof(struct vp_instruction));
|
||||
_mesa_bzero(inst, sizeof(struct prog_instruction));
|
||||
|
||||
inst->SrcReg[0].File = PROGRAM_UNDEFINED;
|
||||
inst->SrcReg[0].Swizzle = SWIZZLE_NOOP;
|
||||
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
|
||||
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
|
||||
inst->SrcReg[2].File = PROGRAM_UNDEFINED;
|
||||
inst->SrcReg[2].Swizzle = SWIZZLE_NOOP;
|
||||
|
||||
inst->DstReg.File = PROGRAM_UNDEFINED;
|
||||
inst->DstReg.WriteMask = WRITEMASK_XYZW;
|
||||
inst->DstReg.CondMask = COND_TR;
|
||||
inst->DstReg.CondSwizzle = SWIZZLE_NOOP;
|
||||
|
||||
inst->Precision = FLOAT32;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ _mesa_parse_nv_vertex_program(GLcontext *ctx, GLenum target,
|
|||
struct vertex_program *program);
|
||||
|
||||
extern void
|
||||
_mesa_print_nv_vertex_instruction(const struct vp_instruction *inst);
|
||||
_mesa_print_nv_vertex_instruction(const struct prog_instruction *inst);
|
||||
|
||||
extern void
|
||||
_mesa_print_nv_vertex_program(const struct vertex_program *program);
|
||||
|
|
|
|||
|
|
@ -1,115 +0,0 @@
|
|||
/*
|
||||
* Mesa 3-D graphics library
|
||||
* Version: 6.3.1
|
||||
*
|
||||
* Copyright (C) 1999-2005 Brian Paul All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
|
||||
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
/* Private vertex program types and constants only used by files
|
||||
* related to vertex programs.
|
||||
*
|
||||
* XXX TO-DO: Rename this file "vertprog.h" since it's not NV-specific.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef NVVERTPROG_H
|
||||
#define NVVERTPROG_H
|
||||
|
||||
|
||||
/* Vertex program opcodes */
|
||||
enum vp_opcode
|
||||
{
|
||||
VP_OPCODE_ABS,
|
||||
VP_OPCODE_ADD,
|
||||
VP_OPCODE_ARL,
|
||||
VP_OPCODE_DP3,
|
||||
VP_OPCODE_DP4,
|
||||
VP_OPCODE_DPH,
|
||||
VP_OPCODE_DST,
|
||||
VP_OPCODE_END, /* Placeholder */
|
||||
VP_OPCODE_EX2, /* ARB only */
|
||||
VP_OPCODE_EXP,
|
||||
VP_OPCODE_FLR, /* ARB */
|
||||
VP_OPCODE_FRC, /* ARB */
|
||||
VP_OPCODE_LG2, /* ARB only */
|
||||
VP_OPCODE_LIT,
|
||||
VP_OPCODE_LOG,
|
||||
VP_OPCODE_MAD,
|
||||
VP_OPCODE_MAX,
|
||||
VP_OPCODE_MIN,
|
||||
VP_OPCODE_MOV,
|
||||
VP_OPCODE_MUL,
|
||||
VP_OPCODE_POW, /* ARB only */
|
||||
VP_OPCODE_PRINT, /* Mesa only */
|
||||
VP_OPCODE_RCC,
|
||||
VP_OPCODE_RCP,
|
||||
VP_OPCODE_RSQ,
|
||||
VP_OPCODE_SGE,
|
||||
VP_OPCODE_SLT,
|
||||
VP_OPCODE_SUB,
|
||||
VP_OPCODE_SWZ, /* ARB only */
|
||||
VP_OPCODE_XPD, /* ARB only */
|
||||
|
||||
VP_MAX_OPCODE
|
||||
};
|
||||
|
||||
|
||||
|
||||
/* Instruction source register */
|
||||
struct vp_src_register
|
||||
{
|
||||
GLuint File:4; /* one of the PROGRAM_* register file values */
|
||||
GLint Index:9; /* may be negative for relative addressing */
|
||||
GLuint Swizzle:12;
|
||||
GLuint Negate:4; /* ARB requires component-wise negation. */
|
||||
GLuint RelAddr:1;
|
||||
GLuint pad:2;
|
||||
};
|
||||
|
||||
|
||||
/* Instruction destination register */
|
||||
struct vp_dst_register
|
||||
{
|
||||
GLuint File:4; /* one of the PROGRAM_* register file values */
|
||||
GLuint Index:8;
|
||||
GLuint WriteMask:4;
|
||||
GLuint pad:16;
|
||||
};
|
||||
|
||||
|
||||
/* Vertex program instruction */
|
||||
struct vp_instruction
|
||||
{
|
||||
GLshort Opcode;
|
||||
#if FEATURE_MESA_program_debug
|
||||
GLshort StringPos;
|
||||
#endif
|
||||
void *Data; /* some arbitrary data, only used for PRINT instruction now */
|
||||
struct vp_src_register SrcReg[3];
|
||||
struct vp_dst_register DstReg;
|
||||
};
|
||||
|
||||
|
||||
extern void
|
||||
_mesa_init_vp_instruction(struct vp_instruction *inst);
|
||||
|
||||
|
||||
#endif /* VERTPROG_H */
|
||||
|
|
@ -37,9 +37,8 @@
|
|||
#include "mtypes.h"
|
||||
#include "program.h"
|
||||
#include "nvfragparse.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "nvvertparse.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "atifragshader.h"
|
||||
|
||||
|
||||
|
|
|
|||
344
src/mesa/shader/program_instruction.h
Normal file
344
src/mesa/shader/program_instruction.h
Normal file
|
|
@ -0,0 +1,344 @@
|
|||
/*
|
||||
* Mesa 3-D graphics library
|
||||
* Version: 6.5
|
||||
*
|
||||
* Copyright (C) 1999-2005 Brian Paul All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
|
||||
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* \file prog_instruction.h
|
||||
*
|
||||
* Private vertex program types and constants only used by files
|
||||
* related to vertex programs.
|
||||
*
|
||||
* \author Brian Paul
|
||||
* \author Keith Whitwell
|
||||
* \author Ian Romanick <idr@us.ibm.com>
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PROG_INSTRUCTION_H
|
||||
#define PROG_INSTRUCTION_H
|
||||
|
||||
/**
|
||||
* Condition codes for GL_NV_fragment_program
|
||||
*/
|
||||
/*@{*/
|
||||
#define COND_GT 1 /* greater than zero */
|
||||
#define COND_EQ 2 /* equal to zero */
|
||||
#define COND_LT 3 /* less than zero */
|
||||
#define COND_UN 4 /* unordered (NaN) */
|
||||
#define COND_GE 5 /* greater then or equal to zero */
|
||||
#define COND_LE 6 /* less then or equal to zero */
|
||||
#define COND_NE 7 /* not equal to zero */
|
||||
#define COND_TR 8 /* always true */
|
||||
#define COND_FL 9 /* always false */
|
||||
/*@}*/
|
||||
|
||||
|
||||
/*
|
||||
* Instruction precision for GL_NV_fragment_program
|
||||
*/
|
||||
/*@{*/
|
||||
#define FLOAT32 0x1
|
||||
#define FLOAT16 0x2
|
||||
#define FIXED12 0x4
|
||||
/*@}*/
|
||||
|
||||
|
||||
/**
|
||||
* Program instruction opcodes, for both vertex and fragment programs.
|
||||
* \note changes to this opcode list must be reflected in t_vb_arbprogram.c
|
||||
*/
|
||||
/* ARB_vp ARB_fp NV_vp NV_fp */
|
||||
enum prog_opcode { /*---------------------------------*/
|
||||
OPCODE_ABS, /* X 1.1 */
|
||||
OPCODE_ADD, /* X X X X */
|
||||
OPCODE_ARL, /* X X */
|
||||
OPCODE_CMP, /* X */
|
||||
OPCODE_COS, /* X 2 */
|
||||
OPCODE_DDX, /* X */
|
||||
OPCODE_DDY, /* X */
|
||||
OPCODE_DP3, /* X X X X */
|
||||
OPCODE_DP4, /* X X X X */
|
||||
OPCODE_DPH, /* X X 1.1 */
|
||||
OPCODE_DST, /* X X X */
|
||||
OPCODE_END, /* X X X X */
|
||||
OPCODE_EX2, /* X X 2 X */
|
||||
OPCODE_EXP, /* X X */
|
||||
OPCODE_FLR, /* X X 2 X */
|
||||
OPCODE_FRC, /* X X 2 X */
|
||||
OPCODE_KIL, /* X */
|
||||
OPCODE_KIL_NV, /* X */
|
||||
OPCODE_LG2, /* X X 2 X */
|
||||
OPCODE_LIT, /* X X X X */
|
||||
OPCODE_LOG, /* X X X */
|
||||
OPCODE_LRP, /* X X */
|
||||
OPCODE_MAD, /* X X X X */
|
||||
OPCODE_MAX, /* X X X X */
|
||||
OPCODE_MIN, /* X X X X */
|
||||
OPCODE_MOV, /* X X X X */
|
||||
OPCODE_MUL, /* X X X X */
|
||||
OPCODE_PK2H, /* X */
|
||||
OPCODE_PK2US, /* X */
|
||||
OPCODE_PK4B, /* X */
|
||||
OPCODE_PK4UB, /* X */
|
||||
OPCODE_POW, /* X X X */
|
||||
OPCODE_PRINT, /* X X */
|
||||
OPCODE_RCC, /* 1.1 */
|
||||
OPCODE_RCP, /* X X X X */
|
||||
OPCODE_RFL, /* X X */
|
||||
OPCODE_RSQ, /* X X X X */
|
||||
OPCODE_SCS, /* X */
|
||||
OPCODE_SEQ, /* 2 X */
|
||||
OPCODE_SFL, /* 2 X */
|
||||
OPCODE_SGE, /* X X X X */
|
||||
OPCODE_SGT, /* 2 X */
|
||||
OPCODE_SIN, /* X 2 X */
|
||||
OPCODE_SLE, /* 2 X */
|
||||
OPCODE_SLT, /* X X X X */
|
||||
OPCODE_SNE, /* 2 X */
|
||||
OPCODE_STR, /* X 2 X */
|
||||
OPCODE_SUB, /* X X 1.1 X */
|
||||
OPCODE_SWZ, /* X X */
|
||||
OPCODE_TEX, /* X X */
|
||||
OPCODE_TXB, /* X */
|
||||
OPCODE_TXD, /* X X */
|
||||
OPCODE_TXP, /* X */
|
||||
OPCODE_TXP_NV, /* X */
|
||||
OPCODE_UP2H, /* X */
|
||||
OPCODE_UP2US, /* X */
|
||||
OPCODE_UP4B, /* X */
|
||||
OPCODE_UP4UB, /* X */
|
||||
OPCODE_X2D, /* X */
|
||||
OPCODE_XPD, /* X X */
|
||||
#if 0
|
||||
OPCODE_ARA, /* NV_vertex_program2 */
|
||||
OPCODE_ARL_NV, /* NV_vertex_program2 */
|
||||
OPCODE_ARR, /* NV_vertex_program2 */
|
||||
|
||||
OPCODE_SEQ, /* NV_vertex_program2 */
|
||||
OPCODE_SFL, /* NV_vertex_program2 */
|
||||
OPCODE_SGT, /* NV_vertex_program2 */
|
||||
OPCODE_SLE, /* NV_vertex_program2 */
|
||||
OPCODE_SNE, /* NV_vertex_program2 */
|
||||
OPCODE_STR, /* NV_vertex_program2 */
|
||||
|
||||
OPCODE_SSG, /* NV_vertex_program2 */
|
||||
OPCODE_COS, /* NV_vertex_program2 */
|
||||
OPCODE_SIN, /* NV_vertex_program2 */
|
||||
|
||||
OPCODE_BRA, /* NV_vertex_program2 */
|
||||
OPCODE_CAL, /* NV_vertex_program2 */
|
||||
OPCODE_RET, /* NV_vertex_program2 */
|
||||
|
||||
OPCODE_PUSHA, /* NV_vertex_program3 */
|
||||
OPCODE_POPA, /* NV_vertex_program3 */
|
||||
|
||||
OPCODE_TEX, /* NV_vertex_program3 */
|
||||
OPCODE_TXB, /* NV_vertex_program3 */
|
||||
OPCODE_TXL, /* NV_vertex_program3 */
|
||||
OPCODE_TXP, /* NV_vertex_program3 */
|
||||
#endif
|
||||
MAX_OPCODE
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* Instruction source register.
|
||||
*/
|
||||
struct prog_src_register
|
||||
{
|
||||
GLuint File:4; /**< One of the PROGRAM_* register file values. */
|
||||
GLint Index:9; /**< May be negative for relative addressing. */
|
||||
GLuint Swizzle:12;
|
||||
GLuint RelAddr:1;
|
||||
|
||||
/**
|
||||
* \name Source register "sign" control.
|
||||
*
|
||||
* The ARB and NV extensions allow varrying degrees of control over the
|
||||
* sign of the source vector components. These values allow enough control
|
||||
* for all flavors of the extensions.
|
||||
*/
|
||||
/*@{*/
|
||||
/**
|
||||
* Per-component negation for the SWZ instruction.
|
||||
*
|
||||
* \since
|
||||
* ARB_vertex_program, ARB_fragment_program
|
||||
*/
|
||||
GLuint NegateBase:4;
|
||||
|
||||
/**
|
||||
* Take the component-wise absolute value.
|
||||
*
|
||||
* \since
|
||||
* NV_fragment_program, NV_fragment_program_option, NV_vertex_program2,
|
||||
* NV_vertex_program2_option.
|
||||
*/
|
||||
GLuint Abs:1;
|
||||
|
||||
/**
|
||||
* Take the component-wise negation. The negation occurs \b after the
|
||||
* (optional) absolute value operation.
|
||||
*/
|
||||
GLuint NegateAbs:1;
|
||||
/*@}*/
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* Instruction destination register.
|
||||
*/
|
||||
struct prog_dst_register
|
||||
{
|
||||
/**
|
||||
* One of the PROGRAM_* register file values.
|
||||
*/
|
||||
GLuint File:4;
|
||||
|
||||
GLuint Index:8;
|
||||
GLuint WriteMask:4;
|
||||
|
||||
/**
|
||||
* \name Conditional destination update control.
|
||||
*
|
||||
* \since
|
||||
* NV_fragment_program, NV_fragment_program_option, NV_vertex_program2,
|
||||
* NV_vertex_program2_option.
|
||||
*/
|
||||
/*@{*/
|
||||
/**
|
||||
* Takes one of the 9 possible condition values (EQ, FL, GT, GE, LE, LT,
|
||||
* NE, TR, or UN). Destination update is enabled if the matching
|
||||
* (swizzled) condition code value passes. When a conditional update mask
|
||||
* is not specified, this will be \c COND_TR.
|
||||
*/
|
||||
GLuint CondMask:4;
|
||||
|
||||
/**
|
||||
* Condition code swizzle value.
|
||||
*/
|
||||
GLuint CondSwizzle:12;
|
||||
|
||||
/**
|
||||
* Selects the condition code register to use for conditional destination
|
||||
* update masking. In NV_fragmnet_program or NV_vertex_program2 mode, only
|
||||
* condition code register 0 is available. In NV_vertex_program3 mode,
|
||||
* condition code registers 0 and 1 are available.
|
||||
*/
|
||||
GLuint CondSrc:1;
|
||||
/*@}*/
|
||||
|
||||
GLuint pad:31;
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* Vertex/fragment program instruction.
|
||||
*/
|
||||
struct prog_instruction
|
||||
{
|
||||
enum prog_opcode Opcode;
|
||||
#if FEATURE_MESA_program_debug
|
||||
GLshort StringPos;
|
||||
#endif
|
||||
/**
|
||||
* Arbitrary data. Used for the PRINT, CAL, and BRA instructions.
|
||||
*/
|
||||
void *Data;
|
||||
|
||||
struct prog_src_register SrcReg[3];
|
||||
struct prog_dst_register DstReg;
|
||||
|
||||
/**
|
||||
* Indicates that the instruction should update the condition code
|
||||
* register.
|
||||
*
|
||||
* \since
|
||||
* NV_fragment_program, NV_fragment_program_option, NV_vertex_program2,
|
||||
* NV_vertex_program2_option.
|
||||
*/
|
||||
GLuint CondUpdate:1;
|
||||
|
||||
/**
|
||||
* If prog_instruction::cc_update is \c GL_TRUE, this value selects the
|
||||
* condition code register that is to be updated.
|
||||
*
|
||||
* In GL_NV_fragment_program or GL_NV_vertex_program2 mode, only condition
|
||||
* code register 0 is available. In GL_NV_vertex_program3 mode, condition code registers
|
||||
* 0 and 1 are available.
|
||||
*
|
||||
* \since
|
||||
* NV_fragment_program, NV_fragment_program_option, NV_vertex_program2,
|
||||
* NV_vertex_program2_option.
|
||||
*/
|
||||
GLuint CondDst:1;
|
||||
|
||||
/**
|
||||
* Saturate each value of the vectored result to the range [0,1] or the
|
||||
* range [-1,1]. \c SSAT mode (i.e., saturation to the range [-1,1]) is
|
||||
* only available in NV_fragment_program2 mode.
|
||||
*
|
||||
* \since
|
||||
* NV_fragment_program, NV_fragment_program_option, NV_vertex_program3.
|
||||
*/
|
||||
GLuint Saturate:2;
|
||||
|
||||
/**
|
||||
* Per-instruction selectable precision.
|
||||
*
|
||||
* \since
|
||||
* NV_fragment_program, NV_fragment_program_option.
|
||||
*/
|
||||
GLuint Precision:3;
|
||||
|
||||
/**
|
||||
* \name Texture source controls.
|
||||
*
|
||||
* The texture source controls are only used with the \c TEX, \c TXD,
|
||||
* \c TXL, and \c TXP instructions.
|
||||
*
|
||||
* \since
|
||||
* ARB_fragment_program, NV_fragment_program, NV_vertex_program3.
|
||||
*/
|
||||
/*@{*/
|
||||
/**
|
||||
* Source texture unit. OpenGL supports a maximum of 32 texture
|
||||
* units.
|
||||
*/
|
||||
GLuint TexSrcUnit:5;
|
||||
|
||||
/**
|
||||
* Source texture target (e.g., GL_TEXTURE_1D, GL_TEXTURE_2D,
|
||||
* GL_TEXTURE_3D, GL_TEXTURE_CUBE, GL_TEXTURE_RECTANGLE_ARB).
|
||||
*/
|
||||
GLuint TexSrcTarget:3;
|
||||
/*@}*/
|
||||
};
|
||||
|
||||
|
||||
extern void
|
||||
_mesa_init_instruction(struct prog_instruction *inst);
|
||||
|
||||
|
||||
#endif /* PROG_INSTRUCTION_H */
|
||||
|
|
@ -30,7 +30,7 @@
|
|||
#include "glheader.h"
|
||||
#include "colormac.h"
|
||||
#include "context.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "macros.h"
|
||||
#include "program.h"
|
||||
|
||||
|
|
@ -179,7 +179,7 @@ static INLINE void emit_char( struct fragment_program *p, char c )
|
|||
* Retrieve a ureg for the given source register. Will emit
|
||||
* constants, apply swizzling and negation as needed.
|
||||
*/
|
||||
static GLuint src_vector( const struct fp_src_register *source )
|
||||
static GLuint src_vector( const struct prog_src_register *source )
|
||||
{
|
||||
GLuint src;
|
||||
|
||||
|
|
@ -262,7 +262,7 @@ static void print_footer( struct fragment_program *p )
|
|||
}
|
||||
|
||||
static void print_dest_reg( struct fragment_program *p,
|
||||
const struct fp_instruction *inst )
|
||||
const struct prog_instruction *inst )
|
||||
{
|
||||
switch (inst->DstReg.File) {
|
||||
case PROGRAM_OUTPUT:
|
||||
|
|
@ -277,7 +277,7 @@ static void print_dest_reg( struct fragment_program *p,
|
|||
}
|
||||
|
||||
static void print_dest( struct fragment_program *p,
|
||||
const struct fp_instruction *inst,
|
||||
const struct prog_instruction *inst,
|
||||
GLuint idx )
|
||||
{
|
||||
print_dest_reg(p, inst);
|
||||
|
|
@ -369,7 +369,7 @@ static void print_expression( struct fragment_program *p,
|
|||
}
|
||||
|
||||
static void do_tex_kill( struct fragment_program *p,
|
||||
const struct fp_instruction *inst,
|
||||
const struct prog_instruction *inst,
|
||||
GLuint arg )
|
||||
{
|
||||
GLuint i;
|
||||
|
|
@ -389,7 +389,7 @@ static void do_tex_kill( struct fragment_program *p,
|
|||
}
|
||||
|
||||
static void do_tex_simple( struct fragment_program *p,
|
||||
const struct fp_instruction *inst,
|
||||
const struct prog_instruction *inst,
|
||||
const char *fn, GLuint texunit, GLuint arg )
|
||||
{
|
||||
emit(p, " %s( ctx, ", fn);
|
||||
|
|
@ -401,7 +401,7 @@ static void do_tex_simple( struct fragment_program *p,
|
|||
|
||||
|
||||
static void do_tex( struct fragment_program *p,
|
||||
const struct fp_instruction *inst,
|
||||
const struct prog_instruction *inst,
|
||||
const char *fn, GLuint texunit, GLuint arg )
|
||||
{
|
||||
GLuint i;
|
||||
|
|
@ -444,7 +444,7 @@ static void do_tex( struct fragment_program *p,
|
|||
|
||||
|
||||
static void saturate( struct fragment_program *p,
|
||||
const struct fp_instruction *inst,
|
||||
const struct prog_instruction *inst,
|
||||
GLuint i )
|
||||
{
|
||||
emit(p, " ");
|
||||
|
|
@ -456,7 +456,7 @@ static void saturate( struct fragment_program *p,
|
|||
|
||||
static void assign_single( GLuint i,
|
||||
struct fragment_program *p,
|
||||
const struct fp_instruction *inst,
|
||||
const struct prog_instruction *inst,
|
||||
const char *fmt,
|
||||
... )
|
||||
{
|
||||
|
|
@ -476,7 +476,7 @@ static void assign_single( GLuint i,
|
|||
}
|
||||
|
||||
static void assign4( struct fragment_program *p,
|
||||
const struct fp_instruction *inst,
|
||||
const struct prog_instruction *inst,
|
||||
const char *fmt,
|
||||
... )
|
||||
{
|
||||
|
|
@ -498,7 +498,7 @@ static void assign4( struct fragment_program *p,
|
|||
}
|
||||
|
||||
static void assign4_replicate( struct fragment_program *p,
|
||||
const struct fp_instruction *inst,
|
||||
const struct prog_instruction *inst,
|
||||
const char *fmt,
|
||||
... )
|
||||
{
|
||||
|
|
@ -537,44 +537,45 @@ static void assign4_replicate( struct fragment_program *p,
|
|||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* XXX This should go away.
|
||||
*/
|
||||
static GLuint nr_args( GLuint opcode )
|
||||
{
|
||||
switch (opcode) {
|
||||
case FP_OPCODE_ABS: return 1;
|
||||
case FP_OPCODE_ADD: return 2;
|
||||
case FP_OPCODE_CMP: return 3;
|
||||
case FP_OPCODE_COS: return 1;
|
||||
case FP_OPCODE_DP3: return 2;
|
||||
case FP_OPCODE_DP4: return 2;
|
||||
case FP_OPCODE_DPH: return 2;
|
||||
case FP_OPCODE_DST: return 2;
|
||||
case FP_OPCODE_EX2: return 1;
|
||||
case FP_OPCODE_FLR: return 1;
|
||||
case FP_OPCODE_FRC: return 1;
|
||||
case FP_OPCODE_KIL: return 1;
|
||||
case FP_OPCODE_LG2: return 1;
|
||||
case FP_OPCODE_LIT: return 1;
|
||||
case FP_OPCODE_LRP: return 3;
|
||||
case FP_OPCODE_MAD: return 3;
|
||||
case FP_OPCODE_MAX: return 2;
|
||||
case FP_OPCODE_MIN: return 2;
|
||||
case FP_OPCODE_MOV: return 1;
|
||||
case FP_OPCODE_MUL: return 2;
|
||||
case FP_OPCODE_POW: return 2;
|
||||
case FP_OPCODE_RCP: return 1;
|
||||
case FP_OPCODE_RSQ: return 1;
|
||||
case FP_OPCODE_SCS: return 1;
|
||||
case FP_OPCODE_SGE: return 2;
|
||||
case FP_OPCODE_SIN: return 1;
|
||||
case FP_OPCODE_SLT: return 2;
|
||||
case FP_OPCODE_SUB: return 2;
|
||||
case FP_OPCODE_SWZ: return 1;
|
||||
case FP_OPCODE_TEX: return 1;
|
||||
case FP_OPCODE_TXB: return 1;
|
||||
case FP_OPCODE_TXP: return 1;
|
||||
case FP_OPCODE_XPD: return 2;
|
||||
case OPCODE_ABS: return 1;
|
||||
case OPCODE_ADD: return 2;
|
||||
case OPCODE_CMP: return 3;
|
||||
case OPCODE_COS: return 1;
|
||||
case OPCODE_DP3: return 2;
|
||||
case OPCODE_DP4: return 2;
|
||||
case OPCODE_DPH: return 2;
|
||||
case OPCODE_DST: return 2;
|
||||
case OPCODE_EX2: return 1;
|
||||
case OPCODE_FLR: return 1;
|
||||
case OPCODE_FRC: return 1;
|
||||
case OPCODE_KIL: return 1;
|
||||
case OPCODE_LG2: return 1;
|
||||
case OPCODE_LIT: return 1;
|
||||
case OPCODE_LRP: return 3;
|
||||
case OPCODE_MAD: return 3;
|
||||
case OPCODE_MAX: return 2;
|
||||
case OPCODE_MIN: return 2;
|
||||
case OPCODE_MOV: return 1;
|
||||
case OPCODE_MUL: return 2;
|
||||
case OPCODE_POW: return 2;
|
||||
case OPCODE_RCP: return 1;
|
||||
case OPCODE_RSQ: return 1;
|
||||
case OPCODE_SCS: return 1;
|
||||
case OPCODE_SGE: return 2;
|
||||
case OPCODE_SIN: return 1;
|
||||
case OPCODE_SLT: return 2;
|
||||
case OPCODE_SUB: return 2;
|
||||
case OPCODE_SWZ: return 1;
|
||||
case OPCODE_TEX: return 1;
|
||||
case OPCODE_TXB: return 1;
|
||||
case OPCODE_TXP: return 1;
|
||||
case OPCODE_XPD: return 2;
|
||||
default: return 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -583,9 +584,9 @@ static GLuint nr_args( GLuint opcode )
|
|||
|
||||
static void translate_program( struct fragment_program *p )
|
||||
{
|
||||
const struct fp_instruction *inst = p->Instructions;
|
||||
const struct prog_instruction *inst = p->Instructions;
|
||||
|
||||
for (; inst->Opcode != FP_OPCODE_END; inst++) {
|
||||
for (; inst->Opcode != OPCODE_END; inst++) {
|
||||
|
||||
GLuint src[3], i;
|
||||
GLuint nr = nr_args( inst->Opcode );
|
||||
|
|
@ -606,23 +607,23 @@ static void translate_program( struct fragment_program *p )
|
|||
}
|
||||
|
||||
switch (inst->Opcode) {
|
||||
case FP_OPCODE_ABS:
|
||||
case OPCODE_ABS:
|
||||
assign4(p, inst, "fabsf(%s)", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_ADD:
|
||||
case OPCODE_ADD:
|
||||
assign4(p, inst, "%s + %s", src[0], src[1]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_CMP:
|
||||
case OPCODE_CMP:
|
||||
assign4(p, inst, "%s < 0.0F ? %s : %s", src[0], src[1], src[2]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_COS:
|
||||
case OPCODE_COS:
|
||||
assign4_replicate(p, inst, "COS(%s)", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_DP3:
|
||||
case OPCODE_DP3:
|
||||
assign4_replicate(p, inst,
|
||||
"%s*%s + %s*%s + %s*%s",
|
||||
deref(src[0],_X),
|
||||
|
|
@ -633,7 +634,7 @@ static void translate_program( struct fragment_program *p )
|
|||
deref(src[1],_Z));
|
||||
break;
|
||||
|
||||
case FP_OPCODE_DP4:
|
||||
case OPCODE_DP4:
|
||||
assign4_replicate(p, inst,
|
||||
"%s*%s + %s*%s + %s*%s + %s*%s",
|
||||
deref(src[0],_X),
|
||||
|
|
@ -644,7 +645,7 @@ static void translate_program( struct fragment_program *p )
|
|||
deref(src[1],_Z));
|
||||
break;
|
||||
|
||||
case FP_OPCODE_DPH:
|
||||
case OPCODE_DPH:
|
||||
assign4_replicate(p, inst,
|
||||
"%s*%s + %s*%s + %s*%s + %s",
|
||||
deref(src[0],_X),
|
||||
|
|
@ -654,7 +655,7 @@ static void translate_program( struct fragment_program *p )
|
|||
deref(src[1],_Z));
|
||||
break;
|
||||
|
||||
case FP_OPCODE_DST:
|
||||
case OPCODE_DST:
|
||||
/* result[0] = 1 * 1;
|
||||
* result[1] = a[1] * b[1];
|
||||
* result[2] = a[2] * 1;
|
||||
|
|
@ -669,27 +670,27 @@ static void translate_program( struct fragment_program *p )
|
|||
assign_single(3, p, inst, "%s", deref(src[1], _W));
|
||||
break;
|
||||
|
||||
case FP_OPCODE_EX2:
|
||||
case OPCODE_EX2:
|
||||
assign4_replicate(p, inst, "powf(2.0, %s)", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_FLR:
|
||||
case OPCODE_FLR:
|
||||
assign4_replicate(p, inst, "floorf(%s)", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_FRC:
|
||||
case OPCODE_FRC:
|
||||
assign4_replicate(p, inst, "%s - floorf(%s)", src[0], src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_KIL:
|
||||
case OPCODE_KIL:
|
||||
do_tex_kill(p, inst, src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_LG2:
|
||||
case OPCODE_LG2:
|
||||
assign4_replicate(p, inst, "LOG2(%s)", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_LIT:
|
||||
case OPCODE_LIT:
|
||||
assign_single(0, p, inst, "1.0");
|
||||
assign_single(1, p, inst, "MIN2(%s, 0)", deref(src[0], _X));
|
||||
assign_single(2, p, inst, "(%s > 0.0) ? expf(%s * MIN2(%s, 0)) : 0.0",
|
||||
|
|
@ -699,45 +700,45 @@ static void translate_program( struct fragment_program *p )
|
|||
assign_single(3, p, inst, "1.0");
|
||||
break;
|
||||
|
||||
case FP_OPCODE_LRP:
|
||||
case OPCODE_LRP:
|
||||
assign4(p, inst,
|
||||
"%s * %s + (1.0 - %s) * %s",
|
||||
src[0], src[1], src[0], src[2]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_MAD:
|
||||
case OPCODE_MAD:
|
||||
assign4(p, inst, "%s * %s + %s", src[0], src[1], src[2]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_MAX:
|
||||
case OPCODE_MAX:
|
||||
assign4(p, inst, "MAX2(%s, %s)", src[0], src[1]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_MIN:
|
||||
case OPCODE_MIN:
|
||||
assign4(p, inst, "MIN2(%s, %s)", src[0], src[1]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_MOV:
|
||||
case OPCODE_MOV:
|
||||
assign4(p, inst, "%s", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_MUL:
|
||||
case OPCODE_MUL:
|
||||
assign4(p, inst, "%s * %s", src[0], src[1]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_POW:
|
||||
case OPCODE_POW:
|
||||
assign4_replicate(p, inst, "powf(%s, %s)", src[0], src[1]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_RCP:
|
||||
case OPCODE_RCP:
|
||||
assign4_replicate(p, inst, "1.0/%s", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_RSQ:
|
||||
case OPCODE_RSQ:
|
||||
assign4_replicate(p, inst, "_mesa_inv_sqrtf(%s)", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_SCS:
|
||||
case OPCODE_SCS:
|
||||
if (inst->DstReg.WriteMask[0]) {
|
||||
assign_single(0, p, inst, "cosf(%s)", deref(src[0], _X));
|
||||
}
|
||||
|
|
@ -747,39 +748,39 @@ static void translate_program( struct fragment_program *p )
|
|||
}
|
||||
break;
|
||||
|
||||
case FP_OPCODE_SGE:
|
||||
case OPCODE_SGE:
|
||||
assign4(p, inst, "%s >= %s ? 1.0 : 0.0", src[0], src[1]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_SIN:
|
||||
case OPCODE_SIN:
|
||||
assign4_replicate(p, inst, "sinf(%s)", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_SLT:
|
||||
case OPCODE_SLT:
|
||||
assign4(p, inst, "%s < %s ? 1.0 : 0.0", src[0], src[1]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_SUB:
|
||||
case OPCODE_SUB:
|
||||
assign4(p, inst, "%s - %s", src[0], src[1]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_SWZ: /* same implementation as MOV: */
|
||||
case OPCODE_SWZ: /* same implementation as MOV: */
|
||||
assign4(p, inst, "%s", src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_TEX:
|
||||
case OPCODE_TEX:
|
||||
do_tex(p, inst, "TEX", inst->TexSrcUnit, src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_TXB:
|
||||
case OPCODE_TXB:
|
||||
do_tex(p, inst, "TXB", inst->TexSrcUnit, src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_TXP:
|
||||
case OPCODE_TXP:
|
||||
do_tex(p, inst, "TXP", inst->TexSrcUnit, src[0]);
|
||||
break;
|
||||
|
||||
case FP_OPCODE_XPD:
|
||||
case OPCODE_XPD:
|
||||
/* Cross product:
|
||||
* result.x = src[0].y * src[1].z - src[0].z * src[1].y;
|
||||
* result.y = src[0].z * src[1].x - src[0].x * src[1].z;
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
#include "glheader.h"
|
||||
#include "colormac.h"
|
||||
#include "context.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "program.h"
|
||||
|
||||
#include "s_nvfragprog.h"
|
||||
|
|
@ -104,7 +104,7 @@ fetch_texel_deriv( GLcontext *ctx, const GLfloat texcoord[4],
|
|||
*/
|
||||
static INLINE const GLfloat *
|
||||
get_register_pointer( GLcontext *ctx,
|
||||
const struct fp_src_register *source,
|
||||
const struct prog_src_register *source,
|
||||
const struct fp_machine *machine,
|
||||
const struct fragment_program *program )
|
||||
{
|
||||
|
|
@ -151,7 +151,7 @@ get_register_pointer( GLcontext *ctx,
|
|||
*/
|
||||
static void
|
||||
fetch_vector4( GLcontext *ctx,
|
||||
const struct fp_src_register *source,
|
||||
const struct prog_src_register *source,
|
||||
const struct fp_machine *machine,
|
||||
const struct fragment_program *program,
|
||||
GLfloat result[4] )
|
||||
|
|
@ -192,7 +192,7 @@ fetch_vector4( GLcontext *ctx,
|
|||
*/
|
||||
static GLboolean
|
||||
fetch_vector4_deriv( GLcontext *ctx,
|
||||
const struct fp_src_register *source,
|
||||
const struct prog_src_register *source,
|
||||
const struct sw_span *span,
|
||||
char xOrY, GLint column, GLfloat result[4] )
|
||||
{
|
||||
|
|
@ -321,7 +321,7 @@ fetch_vector4_deriv( GLcontext *ctx,
|
|||
*/
|
||||
static void
|
||||
fetch_vector1( GLcontext *ctx,
|
||||
const struct fp_src_register *source,
|
||||
const struct prog_src_register *source,
|
||||
const struct fp_machine *machine,
|
||||
const struct fragment_program *program,
|
||||
GLfloat result[4] )
|
||||
|
|
@ -385,13 +385,13 @@ test_cc(GLuint condCode, GLuint ccMaskRule)
|
|||
* set-condition-code flags.
|
||||
*/
|
||||
static void
|
||||
store_vector4( const struct fp_instruction *inst,
|
||||
store_vector4( const struct prog_instruction *inst,
|
||||
struct fp_machine *machine,
|
||||
const GLfloat value[4] )
|
||||
{
|
||||
const struct fp_dst_register *dest = &(inst->DstReg);
|
||||
const struct prog_dst_register *dest = &(inst->DstReg);
|
||||
const GLboolean clamp = inst->Saturate;
|
||||
const GLboolean updateCC = inst->UpdateCondRegister;
|
||||
const GLboolean updateCC = inst->CondUpdate;
|
||||
GLfloat *dstReg;
|
||||
GLfloat dummyReg[4];
|
||||
GLfloat clampedValue[4];
|
||||
|
|
@ -599,7 +599,7 @@ execute_program( GLcontext *ctx,
|
|||
#endif
|
||||
|
||||
for (pc = 0; pc < maxInst; pc++) {
|
||||
const struct fp_instruction *inst = program->Instructions + pc;
|
||||
const struct prog_instruction *inst = program->Instructions + pc;
|
||||
|
||||
if (ctx->FragmentProgram.CallbackEnabled &&
|
||||
ctx->FragmentProgram.Callback) {
|
||||
|
|
@ -609,7 +609,7 @@ execute_program( GLcontext *ctx,
|
|||
}
|
||||
|
||||
switch (inst->Opcode) {
|
||||
case FP_OPCODE_ABS:
|
||||
case OPCODE_ABS:
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -620,7 +620,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_ADD:
|
||||
case OPCODE_ADD:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -632,7 +632,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_CMP:
|
||||
case OPCODE_CMP:
|
||||
{
|
||||
GLfloat a[4], b[4], c[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -645,7 +645,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_COS:
|
||||
case OPCODE_COS:
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector1( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -653,7 +653,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_DDX: /* Partial derivative with respect to X */
|
||||
case OPCODE_DDX: /* Partial derivative with respect to X */
|
||||
{
|
||||
GLfloat a[4], aNext[4], result[4];
|
||||
struct fp_machine dMachine;
|
||||
|
|
@ -679,7 +679,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_DDY: /* Partial derivative with respect to Y */
|
||||
case OPCODE_DDY: /* Partial derivative with respect to Y */
|
||||
{
|
||||
GLfloat a[4], aNext[4], result[4];
|
||||
struct fp_machine dMachine;
|
||||
|
|
@ -698,7 +698,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_DP3:
|
||||
case OPCODE_DP3:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -712,7 +712,7 @@ execute_program( GLcontext *ctx,
|
|||
#endif
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_DP4:
|
||||
case OPCODE_DP4:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -726,7 +726,7 @@ execute_program( GLcontext *ctx,
|
|||
#endif
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_DPH:
|
||||
case OPCODE_DPH:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -736,7 +736,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_DST: /* Distance vector */
|
||||
case OPCODE_DST: /* Distance vector */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -748,7 +748,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_EX2: /* Exponential base 2 */
|
||||
case OPCODE_EX2: /* Exponential base 2 */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector1( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -757,7 +757,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_FLR:
|
||||
case OPCODE_FLR:
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -768,7 +768,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_FRC:
|
||||
case OPCODE_FRC:
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -779,7 +779,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_KIL_NV: /* NV_f_p only */
|
||||
case OPCODE_KIL_NV: /* NV_f_p only */
|
||||
{
|
||||
const GLuint swizzle = inst->DstReg.CondSwizzle;
|
||||
const GLuint condMask = inst->DstReg.CondMask;
|
||||
|
|
@ -791,7 +791,7 @@ execute_program( GLcontext *ctx,
|
|||
}
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_KIL: /* ARB_f_p only */
|
||||
case OPCODE_KIL: /* ARB_f_p only */
|
||||
{
|
||||
GLfloat a[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -800,7 +800,7 @@ execute_program( GLcontext *ctx,
|
|||
}
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_LG2: /* log base 2 */
|
||||
case OPCODE_LG2: /* log base 2 */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector1( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -809,7 +809,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_LIT:
|
||||
case OPCODE_LIT:
|
||||
{
|
||||
const GLfloat epsilon = 1.0F / 256.0F; /* from NV VP spec */
|
||||
GLfloat a[4], result[4];
|
||||
|
|
@ -834,7 +834,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_LRP:
|
||||
case OPCODE_LRP:
|
||||
{
|
||||
GLfloat a[4], b[4], c[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -847,7 +847,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_MAD:
|
||||
case OPCODE_MAD:
|
||||
{
|
||||
GLfloat a[4], b[4], c[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -860,7 +860,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_MAX:
|
||||
case OPCODE_MAX:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -878,7 +878,7 @@ execute_program( GLcontext *ctx,
|
|||
#endif
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_MIN:
|
||||
case OPCODE_MIN:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -890,7 +890,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_MOV:
|
||||
case OPCODE_MOV:
|
||||
{
|
||||
GLfloat result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, result );
|
||||
|
|
@ -901,7 +901,7 @@ execute_program( GLcontext *ctx,
|
|||
#endif
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_MUL:
|
||||
case OPCODE_MUL:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -919,7 +919,7 @@ execute_program( GLcontext *ctx,
|
|||
#endif
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */
|
||||
case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
GLhalfNV hx, hy;
|
||||
|
|
@ -934,7 +934,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_PK2US: /* pack two GLushorts into one 32-bit float */
|
||||
case OPCODE_PK2US: /* pack two GLushorts into one 32-bit float */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
GLuint usx, usy, *rawResult = (GLuint *) result;
|
||||
|
|
@ -948,7 +948,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_PK4B: /* pack four GLbytes into one 32-bit float */
|
||||
case OPCODE_PK4B: /* pack four GLbytes into one 32-bit float */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result;
|
||||
|
|
@ -966,7 +966,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_PK4UB: /* pack four GLubytes into one 32-bit float */
|
||||
case OPCODE_PK4UB: /* pack four GLubytes into one 32-bit float */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result;
|
||||
|
|
@ -984,7 +984,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_POW:
|
||||
case OPCODE_POW:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector1( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -994,7 +994,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_RCP:
|
||||
case OPCODE_RCP:
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector1( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1009,7 +1009,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_RFL:
|
||||
case OPCODE_RFL:
|
||||
{
|
||||
GLfloat axis[4], dir[4], result[4], tmp[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, axis );
|
||||
|
|
@ -1027,7 +1027,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_RSQ: /* 1 / sqrt() */
|
||||
case OPCODE_RSQ: /* 1 / sqrt() */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector1( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1039,7 +1039,7 @@ execute_program( GLcontext *ctx,
|
|||
#endif
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SCS: /* sine and cos */
|
||||
case OPCODE_SCS: /* sine and cos */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector1( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1050,7 +1050,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SEQ: /* set on equal */
|
||||
case OPCODE_SEQ: /* set on equal */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1062,13 +1062,13 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SFL: /* set false, operands ignored */
|
||||
case OPCODE_SFL: /* set false, operands ignored */
|
||||
{
|
||||
static const GLfloat result[4] = { 0.0F, 0.0F, 0.0F, 0.0F };
|
||||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SGE: /* set on greater or equal */
|
||||
case OPCODE_SGE: /* set on greater or equal */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1080,7 +1080,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SGT: /* set on greater */
|
||||
case OPCODE_SGT: /* set on greater */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1092,7 +1092,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SIN:
|
||||
case OPCODE_SIN:
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector1( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1101,7 +1101,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SLE: /* set on less or equal */
|
||||
case OPCODE_SLE: /* set on less or equal */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1113,7 +1113,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SLT: /* set on less */
|
||||
case OPCODE_SLT: /* set on less */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1125,7 +1125,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SNE: /* set on not equal */
|
||||
case OPCODE_SNE: /* set on not equal */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1137,13 +1137,13 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_STR: /* set true, operands ignored */
|
||||
case OPCODE_STR: /* set true, operands ignored */
|
||||
{
|
||||
static const GLfloat result[4] = { 1.0F, 1.0F, 1.0F, 1.0F };
|
||||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SUB:
|
||||
case OPCODE_SUB:
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1155,9 +1155,9 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_SWZ:
|
||||
case OPCODE_SWZ:
|
||||
{
|
||||
const struct fp_src_register *source = &inst->SrcReg[0];
|
||||
const struct prog_src_register *source = &inst->SrcReg[0];
|
||||
const GLfloat *src = get_register_pointer(ctx, source,
|
||||
machine, program);
|
||||
GLfloat result[4];
|
||||
|
|
@ -1178,7 +1178,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_TEX: /* Both ARB and NV frag prog */
|
||||
case OPCODE_TEX: /* Both ARB and NV frag prog */
|
||||
/* Texel lookup */
|
||||
{
|
||||
GLfloat texcoord[4], color[4];
|
||||
|
|
@ -1206,7 +1206,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, color );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_TXB: /* GL_ARB_fragment_program only */
|
||||
case OPCODE_TXB: /* GL_ARB_fragment_program only */
|
||||
/* Texel lookup with LOD bias */
|
||||
{
|
||||
GLfloat texcoord[4], color[4], bias, lambda;
|
||||
|
|
@ -1222,7 +1222,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, color );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_TXD: /* GL_NV_fragment_program only */
|
||||
case OPCODE_TXD: /* GL_NV_fragment_program only */
|
||||
/* Texture lookup w/ partial derivatives for LOD */
|
||||
{
|
||||
GLfloat texcoord[4], dtdx[4], dtdy[4], color[4];
|
||||
|
|
@ -1234,7 +1234,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, color );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_TXP: /* GL_ARB_fragment_program only */
|
||||
case OPCODE_TXP: /* GL_ARB_fragment_program only */
|
||||
/* Texture lookup w/ projective divide */
|
||||
{
|
||||
GLfloat texcoord[4], color[4];
|
||||
|
|
@ -1262,12 +1262,12 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, color );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_TXP_NV: /* GL_NV_fragment_program only */
|
||||
case OPCODE_TXP_NV: /* GL_NV_fragment_program only */
|
||||
/* Texture lookup w/ projective divide */
|
||||
{
|
||||
GLfloat texcoord[4], color[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, texcoord );
|
||||
if (inst->TexSrcIdx != TEXTURE_CUBE_INDEX &&
|
||||
if (inst->TexSrcTarget != TEXTURE_CUBE_INDEX &&
|
||||
texcoord[3] != 0.0) {
|
||||
texcoord[0] /= texcoord[3];
|
||||
texcoord[1] /= texcoord[3];
|
||||
|
|
@ -1279,7 +1279,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, color );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_UP2H: /* unpack two 16-bit floats */
|
||||
case OPCODE_UP2H: /* unpack two 16-bit floats */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
const GLuint *rawBits = (const GLuint *) a;
|
||||
|
|
@ -1292,7 +1292,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_UP2US: /* unpack two GLushorts */
|
||||
case OPCODE_UP2US: /* unpack two GLushorts */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
const GLuint *rawBits = (const GLuint *) a;
|
||||
|
|
@ -1305,7 +1305,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_UP4B: /* unpack four GLbytes */
|
||||
case OPCODE_UP4B: /* unpack four GLbytes */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
const GLuint *rawBits = (const GLuint *) a;
|
||||
|
|
@ -1317,7 +1317,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_UP4UB: /* unpack four GLubytes */
|
||||
case OPCODE_UP4UB: /* unpack four GLubytes */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
const GLuint *rawBits = (const GLuint *) a;
|
||||
|
|
@ -1329,7 +1329,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_XPD: /* cross product */
|
||||
case OPCODE_XPD: /* cross product */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1341,7 +1341,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_X2D: /* 2-D matrix transform */
|
||||
case OPCODE_X2D: /* 2-D matrix transform */
|
||||
{
|
||||
GLfloat a[4], b[4], c[4], result[4];
|
||||
fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a );
|
||||
|
|
@ -1354,7 +1354,7 @@ execute_program( GLcontext *ctx,
|
|||
store_vector4( inst, machine, result );
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_PRINT:
|
||||
case OPCODE_PRINT:
|
||||
{
|
||||
if (inst->SrcReg[0].File != -1) {
|
||||
GLfloat a[4];
|
||||
|
|
@ -1367,7 +1367,7 @@ execute_program( GLcontext *ctx,
|
|||
}
|
||||
}
|
||||
break;
|
||||
case FP_OPCODE_END:
|
||||
case OPCODE_END:
|
||||
return GL_TRUE;
|
||||
default:
|
||||
_mesa_problem(ctx, "Bad opcode %d in _mesa_exec_fragment_program",
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@
|
|||
#include "imports.h"
|
||||
#include "colormac.h"
|
||||
#include "context.h"
|
||||
#include "nvfragprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "macros.h"
|
||||
#include "program.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -614,15 +614,15 @@ static void print_NOP( union instruction op, const struct opcode_info *info )
|
|||
{
|
||||
}
|
||||
|
||||
#define NOP 0
|
||||
#define ALU 1
|
||||
#define SWZ 2
|
||||
|
||||
static const struct opcode_info opcode_info[] =
|
||||
static const struct opcode_info opcode_info[MAX_OPCODE + 3] =
|
||||
{
|
||||
{ 1, "ABS", print_ALU },
|
||||
{ 2, "ADD", print_ALU },
|
||||
{ 1, "ARL", print_NOP },
|
||||
{-1, "CMP", NULL },
|
||||
{-1, "COS", NULL },
|
||||
{-1, "DDX", NULL },
|
||||
{-1, "DDY", NULL },
|
||||
{ 2, "DP3", print_ALU },
|
||||
{ 2, "DP4", print_ALU },
|
||||
{ 2, "DPH", print_ALU },
|
||||
|
|
@ -632,23 +632,49 @@ static const struct opcode_info opcode_info[] =
|
|||
{ 1, "EXP", print_ALU },
|
||||
{ 1, "FLR", print_ALU },
|
||||
{ 1, "FRC", print_ALU },
|
||||
{-1, "KIL", NULL },
|
||||
{-1, "KIL_NV", NULL },
|
||||
{ 1, "LG2", print_ALU },
|
||||
{ 1, "LIT", print_ALU },
|
||||
{ 1, "LOG", print_ALU },
|
||||
{-1, "LRP", NULL },
|
||||
{ 3, "MAD", print_NOP },
|
||||
{ 2, "MAX", print_ALU },
|
||||
{ 2, "MIN", print_ALU },
|
||||
{ 1, "MOV", print_ALU },
|
||||
{ 2, "MUL", print_ALU },
|
||||
{-1, "PK2H", NULL },
|
||||
{-1, "PK2US", NULL },
|
||||
{-1, "PK4B", NULL },
|
||||
{-1, "PK4UB", NULL },
|
||||
{ 2, "POW", print_ALU },
|
||||
{ 1, "PRT", print_ALU }, /* PRINT */
|
||||
{ 1, "RCC", print_NOP },
|
||||
{ 1, "RCP", print_ALU },
|
||||
{-1, "RFL", NULL },
|
||||
{ 1, "RSQ", print_ALU },
|
||||
{-1, "SCS", NULL },
|
||||
{-1, "SEQ", NULL },
|
||||
{-1, "SFL", NULL },
|
||||
{ 2, "SGE", print_ALU },
|
||||
{-1, "SGT", NULL },
|
||||
{-1, "SIN", NULL },
|
||||
{-1, "SLE", NULL },
|
||||
{ 2, "SLT", print_ALU },
|
||||
{-1, "SNE", NULL },
|
||||
{-1, "STR", NULL },
|
||||
{ 2, "SUB", print_ALU },
|
||||
{ 1, "SWZ", print_NOP },
|
||||
{-1, "TEX", NULL },
|
||||
{-1, "TXB", NULL },
|
||||
{-1, "TXD", NULL },
|
||||
{-1, "TXP", NULL },
|
||||
{-1, "TXP_NV", NULL },
|
||||
{-1, "UP2H", NULL },
|
||||
{-1, "UP2US", NULL },
|
||||
{-1, "UP4B", NULL },
|
||||
{-1, "UP4UB", NULL },
|
||||
{-1, "X2d", NULL },
|
||||
{ 2, "XPD", print_ALU },
|
||||
{ 1, "RSW", print_RSW },
|
||||
{ 2, "MSK", print_MSK },
|
||||
|
|
@ -662,11 +688,15 @@ void _tnl_disassem_vba_insn( union instruction op )
|
|||
}
|
||||
|
||||
|
||||
static void (* const opcode_func[])(struct arb_vp_machine *, union instruction) =
|
||||
static void (* const opcode_func[MAX_OPCODE+3])(struct arb_vp_machine *, union instruction) =
|
||||
{
|
||||
do_ABS,
|
||||
do_ADD,
|
||||
do_NOP,
|
||||
do_NOP,/*ARL*/
|
||||
do_NOP,/*CMP*/
|
||||
do_NOP,/*COS*/
|
||||
do_NOP,/*DDX*/
|
||||
do_NOP,/*DDY*/
|
||||
do_DP3,
|
||||
do_DP4,
|
||||
do_DPH,
|
||||
|
|
@ -676,23 +706,49 @@ static void (* const opcode_func[])(struct arb_vp_machine *, union instruction)
|
|||
do_EXP,
|
||||
do_FLR,
|
||||
do_FRC,
|
||||
do_NOP,/*KIL*/
|
||||
do_NOP,/*KIL_NV*/
|
||||
do_LG2,
|
||||
do_LIT,
|
||||
do_LOG,
|
||||
do_NOP,
|
||||
do_NOP,/*LRP*/
|
||||
do_NOP,/*MAD*/
|
||||
do_MAX,
|
||||
do_MIN,
|
||||
do_MOV,
|
||||
do_MUL,
|
||||
do_NOP,/*PK2H*/
|
||||
do_NOP,/*PK2US*/
|
||||
do_NOP,/*PK4B*/
|
||||
do_NOP,/*PK4UB*/
|
||||
do_POW,
|
||||
do_PRT,
|
||||
do_NOP,
|
||||
do_RCP,
|
||||
do_NOP,/*RCC*/
|
||||
do_RCP,/*RCP*/
|
||||
do_NOP,/*RFL*/
|
||||
do_RSQ,
|
||||
do_NOP,/*SCS*/
|
||||
do_NOP,/*SEQ*/
|
||||
do_NOP,/*SFL*/
|
||||
do_SGE,
|
||||
do_NOP,/*SGT*/
|
||||
do_NOP,/*SIN*/
|
||||
do_NOP,/*SLE*/
|
||||
do_SLT,
|
||||
do_NOP,/*SNE*/
|
||||
do_NOP,/*STR*/
|
||||
do_SUB,
|
||||
do_RSW,
|
||||
do_RSW,/*SWZ*/
|
||||
do_NOP,/*TEX*/
|
||||
do_NOP,/*TXB*/
|
||||
do_NOP,/*TXD*/
|
||||
do_NOP,/*TXP*/
|
||||
do_NOP,/*TXP_NV*/
|
||||
do_NOP,/*UP2H*/
|
||||
do_NOP,/*UP2US*/
|
||||
do_NOP,/*UP4B*/
|
||||
do_NOP,/*UP4UB*/
|
||||
do_NOP,/*X2D*/
|
||||
do_XPD,
|
||||
do_RSW,
|
||||
do_MSK,
|
||||
|
|
@ -774,13 +830,14 @@ static struct reg cvp_load_reg( struct compilation *cp,
|
|||
case PROGRAM_WRITE_ONLY:
|
||||
case PROGRAM_ADDRESS:
|
||||
default:
|
||||
_mesa_problem(NULL, "Invalid register file %d in cvp_load_reg()");
|
||||
assert(0);
|
||||
return tmpreg; /* can't happen */
|
||||
}
|
||||
}
|
||||
|
||||
static struct reg cvp_emit_arg( struct compilation *cp,
|
||||
const struct vp_src_register *src,
|
||||
const struct prog_src_register *src,
|
||||
GLuint arg )
|
||||
{
|
||||
struct reg reg = cvp_load_reg( cp, src->File, src->Index, src->RelAddr, arg );
|
||||
|
|
@ -789,7 +846,7 @@ static struct reg cvp_emit_arg( struct compilation *cp,
|
|||
/* Emit any necessary swizzling.
|
||||
*/
|
||||
rsw.dword = 0;
|
||||
rsw.rsw.neg = src->Negate ? WRITEMASK_XYZW : 0;
|
||||
rsw.rsw.neg = src->NegateBase ? WRITEMASK_XYZW : 0;
|
||||
|
||||
/* we're expecting 2-bit swizzles below... */
|
||||
ASSERT(GET_SWZ(src->Swizzle, 0) < 4);
|
||||
|
|
@ -821,7 +878,7 @@ static struct reg cvp_emit_arg( struct compilation *cp,
|
|||
}
|
||||
|
||||
static GLuint cvp_choose_result( struct compilation *cp,
|
||||
const struct vp_dst_register *dst,
|
||||
const struct prog_dst_register *dst,
|
||||
union instruction *fixup )
|
||||
{
|
||||
GLuint mask = dst->WriteMask;
|
||||
|
|
@ -884,7 +941,7 @@ static struct reg cvp_emit_rsw( struct compilation *cp,
|
|||
/* Oops. Degenerate case:
|
||||
*/
|
||||
union instruction *op = cvp_next_instruction(cp);
|
||||
op->alu.opcode = VP_OPCODE_MOV;
|
||||
op->alu.opcode = OPCODE_MOV;
|
||||
op->alu.dst = dst;
|
||||
op->alu.file0 = src.file;
|
||||
op->alu.idx0 = src.idx;
|
||||
|
|
@ -900,7 +957,7 @@ static struct reg cvp_emit_rsw( struct compilation *cp,
|
|||
|
||||
|
||||
static void cvp_emit_inst( struct compilation *cp,
|
||||
const struct vp_instruction *inst )
|
||||
const struct prog_instruction *inst )
|
||||
{
|
||||
const struct opcode_info *info = &opcode_info[inst->Opcode];
|
||||
union instruction *op;
|
||||
|
|
@ -915,13 +972,13 @@ static void cvp_emit_inst( struct compilation *cp,
|
|||
switch (inst->Opcode) {
|
||||
/* Split into mul and add:
|
||||
*/
|
||||
case VP_OPCODE_MAD:
|
||||
case OPCODE_MAD:
|
||||
result = cvp_choose_result( cp, &inst->DstReg, &fixup );
|
||||
for (i = 0; i < 3; i++)
|
||||
reg[i] = cvp_emit_arg( cp, &inst->SrcReg[i], REG_ARG0+i );
|
||||
|
||||
op = cvp_next_instruction(cp);
|
||||
op->alu.opcode = VP_OPCODE_MUL;
|
||||
op->alu.opcode = OPCODE_MUL;
|
||||
op->alu.file0 = reg[0].file;
|
||||
op->alu.idx0 = reg[0].idx;
|
||||
op->alu.file1 = reg[1].file;
|
||||
|
|
@ -929,7 +986,7 @@ static void cvp_emit_inst( struct compilation *cp,
|
|||
op->alu.dst = REG_ARG0;
|
||||
|
||||
op = cvp_next_instruction(cp);
|
||||
op->alu.opcode = VP_OPCODE_ADD;
|
||||
op->alu.opcode = OPCODE_ADD;
|
||||
op->alu.file0 = FILE_REG;
|
||||
op->alu.idx0 = REG_ARG0;
|
||||
op->alu.file1 = reg[2].file;
|
||||
|
|
@ -942,17 +999,17 @@ static void cvp_emit_inst( struct compilation *cp,
|
|||
}
|
||||
break;
|
||||
|
||||
case VP_OPCODE_ARL:
|
||||
case OPCODE_ARL:
|
||||
reg[0] = cvp_emit_arg( cp, &inst->SrcReg[0], REG_ARG0 );
|
||||
|
||||
op = cvp_next_instruction(cp);
|
||||
op->alu.opcode = VP_OPCODE_FLR;
|
||||
op->alu.opcode = OPCODE_FLR;
|
||||
op->alu.dst = REG_ADDR;
|
||||
op->alu.file0 = reg[0].file;
|
||||
op->alu.idx0 = reg[0].idx;
|
||||
break;
|
||||
|
||||
case VP_OPCODE_SWZ: {
|
||||
case OPCODE_SWZ: {
|
||||
GLuint swz0 = 0, swz1 = 0;
|
||||
GLuint neg0 = 0, neg1 = 0;
|
||||
GLuint mask = 0;
|
||||
|
|
@ -964,7 +1021,7 @@ static void cvp_emit_inst( struct compilation *cp,
|
|||
for (i = 0; i < 4; i++) {
|
||||
GLuint swzelt = GET_SWZ(inst->SrcReg[0].Swizzle, i);
|
||||
if (swzelt >= SWIZZLE_ZERO) {
|
||||
neg0 |= inst->SrcReg[0].Negate & (1<<i);
|
||||
neg0 |= inst->SrcReg[0].NegateBase & (1<<i);
|
||||
if (swzelt == SWIZZLE_ONE)
|
||||
swz0 |= SWIZZLE_W << (i*2);
|
||||
else if (i < SWIZZLE_W)
|
||||
|
|
@ -972,7 +1029,7 @@ static void cvp_emit_inst( struct compilation *cp,
|
|||
}
|
||||
else {
|
||||
mask |= 1<<i;
|
||||
neg1 |= inst->SrcReg[0].Negate & (1<<i);
|
||||
neg1 |= inst->SrcReg[0].NegateBase & (1<<i);
|
||||
swz1 |= swzelt << (i*2);
|
||||
}
|
||||
}
|
||||
|
|
@ -1008,7 +1065,7 @@ static void cvp_emit_inst( struct compilation *cp,
|
|||
break;
|
||||
}
|
||||
|
||||
case VP_OPCODE_END:
|
||||
case OPCODE_END:
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -36,9 +36,9 @@
|
|||
|
||||
/* New, internal instructions:
|
||||
*/
|
||||
#define RSW (VP_MAX_OPCODE)
|
||||
#define MSK (VP_MAX_OPCODE+1)
|
||||
#define REL (VP_MAX_OPCODE+2)
|
||||
#define RSW (MAX_OPCODE)
|
||||
#define MSK (MAX_OPCODE+1)
|
||||
#define REL (MAX_OPCODE+2)
|
||||
|
||||
/**
|
||||
* Register files for vertex programs
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@
|
|||
#include "imports.h"
|
||||
#include "simple_list.h"
|
||||
#include "mtypes.h"
|
||||
#include "nvvertprog.h"
|
||||
#include "program_instruction.h"
|
||||
#include "nvvertexec.h"
|
||||
#include "nvprogram.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@
|
|||
#include "t_vp_build.h"
|
||||
|
||||
#include "shader/program.h"
|
||||
#include "shader/nvvertprog.h"
|
||||
#include "shader/program_instruction.h"
|
||||
#include "shader/arbvertparse.h"
|
||||
|
||||
struct state_key {
|
||||
|
|
@ -455,28 +455,32 @@ static void register_matrix_param6( struct tnl_program *p,
|
|||
}
|
||||
|
||||
|
||||
static void emit_arg( struct vp_src_register *src,
|
||||
static void emit_arg( struct prog_src_register *src,
|
||||
struct ureg reg )
|
||||
{
|
||||
src->File = reg.file;
|
||||
src->Index = reg.idx;
|
||||
src->Swizzle = reg.swz;
|
||||
src->Negate = reg.negate;
|
||||
src->NegateBase = reg.negate;
|
||||
src->Abs = 0;
|
||||
src->NegateAbs = 0;
|
||||
src->RelAddr = 0;
|
||||
src->pad = 0;
|
||||
}
|
||||
|
||||
static void emit_dst( struct vp_dst_register *dst,
|
||||
static void emit_dst( struct prog_dst_register *dst,
|
||||
struct ureg reg, GLuint mask )
|
||||
{
|
||||
dst->File = reg.file;
|
||||
dst->Index = reg.idx;
|
||||
/* allow zero as a shorthand for xyzw */
|
||||
dst->WriteMask = mask ? mask : WRITEMASK_XYZW;
|
||||
dst->CondMask = COND_TR;
|
||||
dst->CondSwizzle = 0;
|
||||
dst->CondSrc = 0;
|
||||
dst->pad = 0;
|
||||
}
|
||||
|
||||
static void debug_insn( struct vp_instruction *inst, const char *fn,
|
||||
static void debug_insn( struct prog_instruction *inst, const char *fn,
|
||||
GLuint line )
|
||||
{
|
||||
if (DISASSEM) {
|
||||
|
|
@ -504,7 +508,7 @@ static void emit_op3fn(struct tnl_program *p,
|
|||
GLuint line)
|
||||
{
|
||||
GLuint nr = p->program->Base.NumInstructions++;
|
||||
struct vp_instruction *inst = &p->program->Instructions[nr];
|
||||
struct prog_instruction *inst = &p->program->Instructions[nr];
|
||||
|
||||
if (p->program->Base.NumInstructions > MAX_INSN) {
|
||||
_mesa_problem(0, "Out of instructions in emit_op3fn\n");
|
||||
|
|
@ -542,7 +546,7 @@ static struct ureg make_temp( struct tnl_program *p, struct ureg reg )
|
|||
return reg;
|
||||
else {
|
||||
struct ureg temp = get_temp(p);
|
||||
emit_op1(p, VP_OPCODE_MOV, temp, 0, reg);
|
||||
emit_op1(p, OPCODE_MOV, temp, 0, reg);
|
||||
return temp;
|
||||
}
|
||||
}
|
||||
|
|
@ -557,10 +561,10 @@ static void emit_matrix_transform_vec4( struct tnl_program *p,
|
|||
const struct ureg *mat,
|
||||
struct ureg src)
|
||||
{
|
||||
emit_op2(p, VP_OPCODE_DP4, dest, WRITEMASK_X, src, mat[0]);
|
||||
emit_op2(p, VP_OPCODE_DP4, dest, WRITEMASK_Y, src, mat[1]);
|
||||
emit_op2(p, VP_OPCODE_DP4, dest, WRITEMASK_Z, src, mat[2]);
|
||||
emit_op2(p, VP_OPCODE_DP4, dest, WRITEMASK_W, src, mat[3]);
|
||||
emit_op2(p, OPCODE_DP4, dest, WRITEMASK_X, src, mat[0]);
|
||||
emit_op2(p, OPCODE_DP4, dest, WRITEMASK_Y, src, mat[1]);
|
||||
emit_op2(p, OPCODE_DP4, dest, WRITEMASK_Z, src, mat[2]);
|
||||
emit_op2(p, OPCODE_DP4, dest, WRITEMASK_W, src, mat[3]);
|
||||
}
|
||||
|
||||
/* This version is much easier to implement if writemasks are not
|
||||
|
|
@ -579,10 +583,10 @@ static void emit_transpose_matrix_transform_vec4( struct tnl_program *p,
|
|||
else
|
||||
tmp = dest;
|
||||
|
||||
emit_op2(p, VP_OPCODE_MUL, tmp, 0, swizzle1(src,X), mat[0]);
|
||||
emit_op3(p, VP_OPCODE_MAD, tmp, 0, swizzle1(src,Y), mat[1], tmp);
|
||||
emit_op3(p, VP_OPCODE_MAD, tmp, 0, swizzle1(src,Z), mat[2], tmp);
|
||||
emit_op3(p, VP_OPCODE_MAD, dest, 0, swizzle1(src,W), mat[3], tmp);
|
||||
emit_op2(p, OPCODE_MUL, tmp, 0, swizzle1(src,X), mat[0]);
|
||||
emit_op3(p, OPCODE_MAD, tmp, 0, swizzle1(src,Y), mat[1], tmp);
|
||||
emit_op3(p, OPCODE_MAD, tmp, 0, swizzle1(src,Z), mat[2], tmp);
|
||||
emit_op3(p, OPCODE_MAD, dest, 0, swizzle1(src,W), mat[3], tmp);
|
||||
|
||||
if (dest.file != PROGRAM_TEMPORARY)
|
||||
release_temp(p, tmp);
|
||||
|
|
@ -593,9 +597,9 @@ static void emit_matrix_transform_vec3( struct tnl_program *p,
|
|||
const struct ureg *mat,
|
||||
struct ureg src)
|
||||
{
|
||||
emit_op2(p, VP_OPCODE_DP3, dest, WRITEMASK_X, src, mat[0]);
|
||||
emit_op2(p, VP_OPCODE_DP3, dest, WRITEMASK_Y, src, mat[1]);
|
||||
emit_op2(p, VP_OPCODE_DP3, dest, WRITEMASK_Z, src, mat[2]);
|
||||
emit_op2(p, OPCODE_DP3, dest, WRITEMASK_X, src, mat[0]);
|
||||
emit_op2(p, OPCODE_DP3, dest, WRITEMASK_Y, src, mat[1]);
|
||||
emit_op2(p, OPCODE_DP3, dest, WRITEMASK_Z, src, mat[2]);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -604,9 +608,9 @@ static void emit_normalize_vec3( struct tnl_program *p,
|
|||
struct ureg src )
|
||||
{
|
||||
struct ureg tmp = get_temp(p);
|
||||
emit_op2(p, VP_OPCODE_DP3, tmp, 0, src, src);
|
||||
emit_op1(p, VP_OPCODE_RSQ, tmp, 0, tmp);
|
||||
emit_op2(p, VP_OPCODE_MUL, dest, 0, src, tmp);
|
||||
emit_op2(p, OPCODE_DP3, tmp, 0, src, src);
|
||||
emit_op1(p, OPCODE_RSQ, tmp, 0, tmp);
|
||||
emit_op2(p, OPCODE_MUL, dest, 0, src, tmp);
|
||||
release_temp(p, tmp);
|
||||
}
|
||||
|
||||
|
|
@ -615,7 +619,7 @@ static void emit_passthrough( struct tnl_program *p,
|
|||
GLuint output )
|
||||
{
|
||||
struct ureg out = register_output(p, output);
|
||||
emit_op1(p, VP_OPCODE_MOV, out, 0, register_input(p, input));
|
||||
emit_op1(p, OPCODE_MOV, out, 0, register_input(p, input));
|
||||
}
|
||||
|
||||
static struct ureg get_eye_position( struct tnl_program *p )
|
||||
|
|
@ -680,7 +684,7 @@ static struct ureg get_eye_normal( struct tnl_program *p )
|
|||
struct ureg rescale = register_param2(p, STATE_INTERNAL,
|
||||
STATE_NORMAL_SCALE);
|
||||
|
||||
emit_op2( p, VP_OPCODE_MUL, p->eye_normal, 0, normal,
|
||||
emit_op2( p, OPCODE_MUL, p->eye_normal, 0, normal,
|
||||
swizzle1(rescale, X));
|
||||
}
|
||||
}
|
||||
|
|
@ -766,7 +770,7 @@ static struct ureg get_scenecolor( struct tnl_program *p, GLuint side )
|
|||
struct ureg material_ambient = get_material(p, side, STATE_AMBIENT);
|
||||
struct ureg material_diffuse = get_material(p, side, STATE_DIFFUSE);
|
||||
struct ureg tmp = make_temp(p, material_diffuse);
|
||||
emit_op3(p, VP_OPCODE_MAD, tmp, WRITEMASK_XYZ, lm_ambient,
|
||||
emit_op3(p, OPCODE_MAD, tmp, WRITEMASK_XYZ, lm_ambient,
|
||||
material_ambient, material_emission);
|
||||
return tmp;
|
||||
}
|
||||
|
|
@ -784,7 +788,7 @@ static struct ureg get_lightprod( struct tnl_program *p, GLuint light,
|
|||
register_param3(p, STATE_LIGHT, light, property);
|
||||
struct ureg material_value = get_material(p, side, property);
|
||||
struct ureg tmp = get_temp(p);
|
||||
emit_op2(p, VP_OPCODE_MUL, tmp, 0, light_value, material_value);
|
||||
emit_op2(p, OPCODE_MUL, tmp, 0, light_value, material_value);
|
||||
return tmp;
|
||||
}
|
||||
else
|
||||
|
|
@ -809,10 +813,10 @@ static struct ureg calculate_light_attenuation( struct tnl_program *p,
|
|||
struct ureg slt = get_temp(p);
|
||||
|
||||
emit_normalize_vec3( p, spot, spot_dir ); /* XXX: precompute! */
|
||||
emit_op2(p, VP_OPCODE_DP3, spot, 0, negate(VPpli), spot);
|
||||
emit_op2(p, VP_OPCODE_SLT, slt, 0, swizzle1(spot_dir,W), spot);
|
||||
emit_op2(p, VP_OPCODE_POW, spot, 0, spot, swizzle1(attenuation, W));
|
||||
emit_op2(p, VP_OPCODE_MUL, att, 0, slt, spot);
|
||||
emit_op2(p, OPCODE_DP3, spot, 0, negate(VPpli), spot);
|
||||
emit_op2(p, OPCODE_SLT, slt, 0, swizzle1(spot_dir,W), spot);
|
||||
emit_op2(p, OPCODE_POW, spot, 0, spot, swizzle1(attenuation, W));
|
||||
emit_op2(p, OPCODE_MUL, att, 0, slt, spot);
|
||||
|
||||
release_temp(p, spot);
|
||||
release_temp(p, slt);
|
||||
|
|
@ -823,20 +827,20 @@ static struct ureg calculate_light_attenuation( struct tnl_program *p,
|
|||
if (p->state->unit[i].light_attenuated) {
|
||||
|
||||
/* 1/d,d,d,1/d */
|
||||
emit_op1(p, VP_OPCODE_RCP, dist, WRITEMASK_YZ, dist);
|
||||
emit_op1(p, OPCODE_RCP, dist, WRITEMASK_YZ, dist);
|
||||
/* 1,d,d*d,1/d */
|
||||
emit_op2(p, VP_OPCODE_MUL, dist, WRITEMASK_XZ, dist, swizzle1(dist,Y));
|
||||
emit_op2(p, OPCODE_MUL, dist, WRITEMASK_XZ, dist, swizzle1(dist,Y));
|
||||
/* 1/dist-atten */
|
||||
emit_op2(p, VP_OPCODE_DP3, dist, 0, attenuation, dist);
|
||||
emit_op2(p, OPCODE_DP3, dist, 0, attenuation, dist);
|
||||
|
||||
if (!p->state->unit[i].light_spotcutoff_is_180) {
|
||||
/* dist-atten */
|
||||
emit_op1(p, VP_OPCODE_RCP, dist, 0, dist);
|
||||
emit_op1(p, OPCODE_RCP, dist, 0, dist);
|
||||
/* spot-atten * dist-atten */
|
||||
emit_op2(p, VP_OPCODE_MUL, att, 0, dist, att);
|
||||
emit_op2(p, OPCODE_MUL, att, 0, dist, att);
|
||||
} else {
|
||||
/* dist-atten */
|
||||
emit_op1(p, VP_OPCODE_RCP, att, 0, dist);
|
||||
emit_op1(p, OPCODE_RCP, att, 0, dist);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -871,7 +875,7 @@ static void build_lighting( struct tnl_program *p )
|
|||
|
||||
{
|
||||
struct ureg shininess = get_material(p, 0, STATE_SHININESS);
|
||||
emit_op1(p, VP_OPCODE_MOV, dots, WRITEMASK_W, swizzle1(shininess,X));
|
||||
emit_op1(p, OPCODE_MOV, dots, WRITEMASK_W, swizzle1(shininess,X));
|
||||
release_temp(p, shininess);
|
||||
|
||||
_col0 = make_temp(p, get_scenecolor(p, 0));
|
||||
|
|
@ -884,7 +888,7 @@ static void build_lighting( struct tnl_program *p )
|
|||
|
||||
if (twoside) {
|
||||
struct ureg shininess = get_material(p, 1, STATE_SHININESS);
|
||||
emit_op1(p, VP_OPCODE_MOV, dots, WRITEMASK_Z,
|
||||
emit_op1(p, OPCODE_MOV, dots, WRITEMASK_Z,
|
||||
negate(swizzle1(shininess,X)));
|
||||
release_temp(p, shininess);
|
||||
|
||||
|
|
@ -900,22 +904,22 @@ static void build_lighting( struct tnl_program *p )
|
|||
*/
|
||||
{
|
||||
struct ureg res0 = register_output( p, VERT_RESULT_COL0 );
|
||||
emit_op1(p, VP_OPCODE_MOV, res0, 0, _col0);
|
||||
emit_op1(p, OPCODE_MOV, res0, 0, _col0);
|
||||
}
|
||||
|
||||
if (separate) {
|
||||
struct ureg res1 = register_output( p, VERT_RESULT_COL1 );
|
||||
emit_op1(p, VP_OPCODE_MOV, res1, 0, _col1);
|
||||
emit_op1(p, OPCODE_MOV, res1, 0, _col1);
|
||||
}
|
||||
|
||||
if (twoside) {
|
||||
struct ureg res0 = register_output( p, VERT_RESULT_BFC0 );
|
||||
emit_op1(p, VP_OPCODE_MOV, res0, 0, _bfc0);
|
||||
emit_op1(p, OPCODE_MOV, res0, 0, _bfc0);
|
||||
}
|
||||
|
||||
if (twoside && separate) {
|
||||
struct ureg res1 = register_output( p, VERT_RESULT_BFC1 );
|
||||
emit_op1(p, VP_OPCODE_MOV, res1, 0, _bfc1);
|
||||
emit_op1(p, OPCODE_MOV, res1, 0, _bfc1);
|
||||
}
|
||||
|
||||
if (nr_lights == 0) {
|
||||
|
|
@ -950,14 +954,14 @@ static void build_lighting( struct tnl_program *p )
|
|||
|
||||
/* Calulate VPpli vector
|
||||
*/
|
||||
emit_op2(p, VP_OPCODE_SUB, VPpli, 0, Ppli, V);
|
||||
emit_op2(p, OPCODE_SUB, VPpli, 0, Ppli, V);
|
||||
|
||||
/* Normalize VPpli. The dist value also used in
|
||||
* attenuation below.
|
||||
*/
|
||||
emit_op2(p, VP_OPCODE_DP3, dist, 0, VPpli, VPpli);
|
||||
emit_op1(p, VP_OPCODE_RSQ, dist, 0, dist);
|
||||
emit_op2(p, VP_OPCODE_MUL, VPpli, 0, VPpli, dist);
|
||||
emit_op2(p, OPCODE_DP3, dist, 0, VPpli, VPpli);
|
||||
emit_op1(p, OPCODE_RSQ, dist, 0, dist);
|
||||
emit_op2(p, OPCODE_MUL, VPpli, 0, VPpli, dist);
|
||||
|
||||
|
||||
/* Calculate attenuation:
|
||||
|
|
@ -972,11 +976,11 @@ static void build_lighting( struct tnl_program *p )
|
|||
*/
|
||||
if (p->state->light_local_viewer) {
|
||||
struct ureg eye_hat = get_eye_position_normalized(p);
|
||||
emit_op2(p, VP_OPCODE_SUB, half, 0, VPpli, eye_hat);
|
||||
emit_op2(p, OPCODE_SUB, half, 0, VPpli, eye_hat);
|
||||
}
|
||||
else {
|
||||
struct ureg z_dir = swizzle(get_identity_param(p),X,Y,W,Z);
|
||||
emit_op2(p, VP_OPCODE_ADD, half, 0, VPpli, z_dir);
|
||||
emit_op2(p, OPCODE_ADD, half, 0, VPpli, z_dir);
|
||||
}
|
||||
|
||||
emit_normalize_vec3(p, half, half);
|
||||
|
|
@ -986,8 +990,8 @@ static void build_lighting( struct tnl_program *p )
|
|||
|
||||
/* Calculate dot products:
|
||||
*/
|
||||
emit_op2(p, VP_OPCODE_DP3, dots, WRITEMASK_X, normal, VPpli);
|
||||
emit_op2(p, VP_OPCODE_DP3, dots, WRITEMASK_Y, normal, half);
|
||||
emit_op2(p, OPCODE_DP3, dots, WRITEMASK_X, normal, VPpli);
|
||||
emit_op2(p, OPCODE_DP3, dots, WRITEMASK_Y, normal, half);
|
||||
|
||||
|
||||
/* Front face lighting:
|
||||
|
|
@ -999,10 +1003,10 @@ static void build_lighting( struct tnl_program *p )
|
|||
struct ureg res0, res1;
|
||||
GLuint mask0, mask1;
|
||||
|
||||
emit_op1(p, VP_OPCODE_LIT, lit, 0, dots);
|
||||
emit_op1(p, OPCODE_LIT, lit, 0, dots);
|
||||
|
||||
if (!is_undef(att))
|
||||
emit_op2(p, VP_OPCODE_MUL, lit, 0, lit, att);
|
||||
emit_op2(p, OPCODE_MUL, lit, 0, lit, att);
|
||||
|
||||
|
||||
if (count == nr_lights) {
|
||||
|
|
@ -1025,9 +1029,9 @@ static void build_lighting( struct tnl_program *p )
|
|||
res1 = _col1;
|
||||
}
|
||||
|
||||
emit_op3(p, VP_OPCODE_MAD, _col0, 0, swizzle1(lit,X), ambient, _col0);
|
||||
emit_op3(p, VP_OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _col0);
|
||||
emit_op3(p, VP_OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _col1);
|
||||
emit_op3(p, OPCODE_MAD, _col0, 0, swizzle1(lit,X), ambient, _col0);
|
||||
emit_op3(p, OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _col0);
|
||||
emit_op3(p, OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _col1);
|
||||
|
||||
release_temp(p, ambient);
|
||||
release_temp(p, diffuse);
|
||||
|
|
@ -1043,10 +1047,10 @@ static void build_lighting( struct tnl_program *p )
|
|||
struct ureg res0, res1;
|
||||
GLuint mask0, mask1;
|
||||
|
||||
emit_op1(p, VP_OPCODE_LIT, lit, 0, negate(swizzle(dots,X,Y,W,Z)));
|
||||
emit_op1(p, OPCODE_LIT, lit, 0, negate(swizzle(dots,X,Y,W,Z)));
|
||||
|
||||
if (!is_undef(att))
|
||||
emit_op2(p, VP_OPCODE_MUL, lit, 0, lit, att);
|
||||
emit_op2(p, OPCODE_MUL, lit, 0, lit, att);
|
||||
|
||||
if (count == nr_lights) {
|
||||
if (separate) {
|
||||
|
|
@ -1068,9 +1072,9 @@ static void build_lighting( struct tnl_program *p )
|
|||
mask1 = 0;
|
||||
}
|
||||
|
||||
emit_op3(p, VP_OPCODE_MAD, _bfc0, 0, swizzle1(lit,X), ambient, _bfc0);
|
||||
emit_op3(p, VP_OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _bfc0);
|
||||
emit_op3(p, VP_OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _bfc1);
|
||||
emit_op3(p, OPCODE_MAD, _bfc0, 0, swizzle1(lit,X), ambient, _bfc0);
|
||||
emit_op3(p, OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _bfc0);
|
||||
emit_op3(p, OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _bfc1);
|
||||
|
||||
release_temp(p, ambient);
|
||||
release_temp(p, diffuse);
|
||||
|
|
@ -1106,22 +1110,22 @@ static void build_fog( struct tnl_program *p )
|
|||
switch (p->state->fog_mode) {
|
||||
case FOG_LINEAR: {
|
||||
struct ureg id = get_identity_param(p);
|
||||
emit_op2(p, VP_OPCODE_SUB, tmp, 0, swizzle1(params,Z), input);
|
||||
emit_op2(p, VP_OPCODE_MUL, tmp, 0, tmp, swizzle1(params,W));
|
||||
emit_op2(p, VP_OPCODE_MAX, tmp, 0, tmp, swizzle1(id,X)); /* saturate */
|
||||
emit_op2(p, VP_OPCODE_MIN, fog, WRITEMASK_X, tmp, swizzle1(id,W));
|
||||
emit_op2(p, OPCODE_SUB, tmp, 0, swizzle1(params,Z), input);
|
||||
emit_op2(p, OPCODE_MUL, tmp, 0, tmp, swizzle1(params,W));
|
||||
emit_op2(p, OPCODE_MAX, tmp, 0, tmp, swizzle1(id,X)); /* saturate */
|
||||
emit_op2(p, OPCODE_MIN, fog, WRITEMASK_X, tmp, swizzle1(id,W));
|
||||
break;
|
||||
}
|
||||
case FOG_EXP:
|
||||
emit_op1(p, VP_OPCODE_ABS, tmp, 0, input);
|
||||
emit_op2(p, VP_OPCODE_MUL, tmp, 0, tmp, swizzle1(params,X));
|
||||
emit_op2(p, VP_OPCODE_POW, fog, WRITEMASK_X,
|
||||
emit_op1(p, OPCODE_ABS, tmp, 0, input);
|
||||
emit_op2(p, OPCODE_MUL, tmp, 0, tmp, swizzle1(params,X));
|
||||
emit_op2(p, OPCODE_POW, fog, WRITEMASK_X,
|
||||
register_const1f(p, M_E), negate(tmp));
|
||||
break;
|
||||
case FOG_EXP2:
|
||||
emit_op2(p, VP_OPCODE_MUL, tmp, 0, input, swizzle1(params,X));
|
||||
emit_op2(p, VP_OPCODE_MUL, tmp, 0, tmp, tmp);
|
||||
emit_op2(p, VP_OPCODE_POW, fog, WRITEMASK_X,
|
||||
emit_op2(p, OPCODE_MUL, tmp, 0, input, swizzle1(params,X));
|
||||
emit_op2(p, OPCODE_MUL, tmp, 0, tmp, tmp);
|
||||
emit_op2(p, OPCODE_POW, fog, WRITEMASK_X,
|
||||
register_const1f(p, M_E), negate(tmp));
|
||||
break;
|
||||
}
|
||||
|
|
@ -1133,7 +1137,7 @@ static void build_fog( struct tnl_program *p )
|
|||
*
|
||||
* KW: Is it really necessary to do anything in this case?
|
||||
*/
|
||||
emit_op1(p, VP_OPCODE_MOV, fog, WRITEMASK_X, input);
|
||||
emit_op1(p, OPCODE_MOV, fog, WRITEMASK_X, input);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1146,11 +1150,11 @@ static void build_reflect_texgen( struct tnl_program *p,
|
|||
struct ureg tmp = get_temp(p);
|
||||
|
||||
/* n.u */
|
||||
emit_op2(p, VP_OPCODE_DP3, tmp, 0, normal, eye_hat);
|
||||
emit_op2(p, OPCODE_DP3, tmp, 0, normal, eye_hat);
|
||||
/* 2n.u */
|
||||
emit_op2(p, VP_OPCODE_ADD, tmp, 0, tmp, tmp);
|
||||
emit_op2(p, OPCODE_ADD, tmp, 0, tmp, tmp);
|
||||
/* (-2n.u)n + u */
|
||||
emit_op3(p, VP_OPCODE_MAD, dest, writemask, negate(tmp), normal, eye_hat);
|
||||
emit_op3(p, OPCODE_MAD, dest, writemask, negate(tmp), normal, eye_hat);
|
||||
}
|
||||
|
||||
static void build_sphere_texgen( struct tnl_program *p,
|
||||
|
|
@ -1174,21 +1178,21 @@ static void build_sphere_texgen( struct tnl_program *p,
|
|||
*/
|
||||
|
||||
/* n.u */
|
||||
emit_op2(p, VP_OPCODE_DP3, tmp, 0, normal, eye_hat);
|
||||
emit_op2(p, OPCODE_DP3, tmp, 0, normal, eye_hat);
|
||||
/* 2n.u */
|
||||
emit_op2(p, VP_OPCODE_ADD, tmp, 0, tmp, tmp);
|
||||
emit_op2(p, OPCODE_ADD, tmp, 0, tmp, tmp);
|
||||
/* (-2n.u)n + u */
|
||||
emit_op3(p, VP_OPCODE_MAD, r, 0, negate(tmp), normal, eye_hat);
|
||||
emit_op3(p, OPCODE_MAD, r, 0, negate(tmp), normal, eye_hat);
|
||||
/* r + 0,0,1 */
|
||||
emit_op2(p, VP_OPCODE_ADD, tmp, 0, r, swizzle(id,X,Y,W,Z));
|
||||
emit_op2(p, OPCODE_ADD, tmp, 0, r, swizzle(id,X,Y,W,Z));
|
||||
/* rx^2 + ry^2 + (rz+1)^2 */
|
||||
emit_op2(p, VP_OPCODE_DP3, tmp, 0, tmp, tmp);
|
||||
emit_op2(p, OPCODE_DP3, tmp, 0, tmp, tmp);
|
||||
/* 2/m */
|
||||
emit_op1(p, VP_OPCODE_RSQ, tmp, 0, tmp);
|
||||
emit_op1(p, OPCODE_RSQ, tmp, 0, tmp);
|
||||
/* 1/m */
|
||||
emit_op2(p, VP_OPCODE_MUL, inv_m, 0, tmp, half);
|
||||
emit_op2(p, OPCODE_MUL, inv_m, 0, tmp, half);
|
||||
/* r/m + 1/2 */
|
||||
emit_op3(p, VP_OPCODE_MAD, dest, writemask, r, inv_m, half);
|
||||
emit_op3(p, OPCODE_MAD, dest, writemask, r, inv_m, half);
|
||||
|
||||
release_temp(p, tmp);
|
||||
release_temp(p, r);
|
||||
|
|
@ -1237,7 +1241,7 @@ static void build_texture_transform( struct tnl_program *p )
|
|||
register_param3(p, STATE_TEXGEN, i,
|
||||
STATE_TEXGEN_OBJECT_S + j);
|
||||
|
||||
emit_op2(p, VP_OPCODE_DP4, out_texgen, WRITEMASK_X << j,
|
||||
emit_op2(p, OPCODE_DP4, out_texgen, WRITEMASK_X << j,
|
||||
obj, plane );
|
||||
break;
|
||||
}
|
||||
|
|
@ -1247,7 +1251,7 @@ static void build_texture_transform( struct tnl_program *p )
|
|||
register_param3(p, STATE_TEXGEN, i,
|
||||
STATE_TEXGEN_EYE_S + j);
|
||||
|
||||
emit_op2(p, VP_OPCODE_DP4, out_texgen, WRITEMASK_X << j,
|
||||
emit_op2(p, OPCODE_DP4, out_texgen, WRITEMASK_X << j,
|
||||
eye, plane );
|
||||
break;
|
||||
}
|
||||
|
|
@ -1277,12 +1281,12 @@ static void build_texture_transform( struct tnl_program *p )
|
|||
|
||||
if (normal_mask) {
|
||||
struct ureg normal = get_eye_normal(p);
|
||||
emit_op1(p, VP_OPCODE_MOV, out_texgen, normal_mask, normal );
|
||||
emit_op1(p, OPCODE_MOV, out_texgen, normal_mask, normal );
|
||||
}
|
||||
|
||||
if (copy_mask) {
|
||||
struct ureg in = register_input(p, VERT_ATTRIB_TEX0+i);
|
||||
emit_op1(p, VP_OPCODE_MOV, out_texgen, copy_mask, in );
|
||||
emit_op1(p, OPCODE_MOV, out_texgen, copy_mask, in );
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1323,19 +1327,19 @@ static void build_pointsize( struct tnl_program *p )
|
|||
struct ureg ut = get_temp(p);
|
||||
|
||||
/* 1, -Z, Z * Z, 1 */
|
||||
emit_op1(p, VP_OPCODE_MOV, ut, 0, swizzle1(get_identity_param(p), W));
|
||||
emit_op2(p, VP_OPCODE_MUL, ut, WRITEMASK_YZ, ut, negate(swizzle1(eye, Z)));
|
||||
emit_op2(p, VP_OPCODE_MUL, ut, WRITEMASK_Z, ut, negate(swizzle1(eye, Z)));
|
||||
emit_op1(p, OPCODE_MOV, ut, 0, swizzle1(get_identity_param(p), W));
|
||||
emit_op2(p, OPCODE_MUL, ut, WRITEMASK_YZ, ut, negate(swizzle1(eye, Z)));
|
||||
emit_op2(p, OPCODE_MUL, ut, WRITEMASK_Z, ut, negate(swizzle1(eye, Z)));
|
||||
|
||||
|
||||
/* p1 + p2 * dist + p3 * dist * dist, 0 */
|
||||
emit_op2(p, VP_OPCODE_DP3, ut, 0, ut, state_attenuation);
|
||||
emit_op2(p, OPCODE_DP3, ut, 0, ut, state_attenuation);
|
||||
|
||||
/* 1 / factor */
|
||||
emit_op1(p, VP_OPCODE_RCP, ut, 0, ut );
|
||||
emit_op1(p, OPCODE_RCP, ut, 0, ut );
|
||||
|
||||
/* out = pointSize / factor */
|
||||
emit_op2(p, VP_OPCODE_MUL, out, WRITEMASK_X, ut, state_size);
|
||||
emit_op2(p, OPCODE_MUL, out, WRITEMASK_X, ut, state_size);
|
||||
|
||||
release_temp(p, ut);
|
||||
}
|
||||
|
|
@ -1371,7 +1375,7 @@ static void build_tnl_program( struct tnl_program *p )
|
|||
|
||||
/* Finish up:
|
||||
*/
|
||||
emit_op1(p, VP_OPCODE_END, undef, 0, undef);
|
||||
emit_op1(p, OPCODE_END, undef, 0, undef);
|
||||
|
||||
/* Disassemble:
|
||||
*/
|
||||
|
|
@ -1402,7 +1406,7 @@ create_new_program( const struct state_key *key,
|
|||
else
|
||||
p.temp_reserved = ~((1<<max_temps)-1);
|
||||
|
||||
p.program->Instructions = MALLOC(sizeof(struct vp_instruction) * MAX_INSN);
|
||||
p.program->Instructions = MALLOC(sizeof(struct prog_instruction) * MAX_INSN);
|
||||
p.program->Base.String = 0;
|
||||
p.program->Base.NumInstructions =
|
||||
p.program->Base.NumTemporaries =
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue