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radv, aco: collect statistics if requested but executables are not

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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
This commit is contained in:
Rhys Perry 2020-03-19 15:09:31 +00:00 • committed by Marge Bot
parent 507956ed04
commit 7e6aec6687
4 changed files with 22 additions and 17 deletions
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2
src/amd/compiler/aco_interface.cpp
View file

@ -78,7 +78,7 @@ void aco_compile_shader(unsigned shader_count,
ac_shader_config config = {0};
std::unique_ptr<aco::Program> program{new aco::Program};
program->collect_statistics = args->options->record_ir;
program->collect_statistics = args->options->record_stats;
if (program->collect_statistics)
memset(program->statistics, 0, sizeof(program->statistics));

21
src/amd/vulkan/radv_pipeline.c
View file

@ -2758,6 +2758,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
struct radv_shader_info infos[MESA_SHADER_STAGES] = {0};
unsigned char hash[20], gs_copy_hash[20];
bool keep_executable_info = (flags & VK_PIPELINE_CREATE_CAPTURE_INTERNAL_REPRESENTATIONS_BIT_KHR) || device->keep_shader_info;
bool keep_statistic_info = (flags & VK_PIPELINE_CREATE_CAPTURE_STATISTICS_BIT_KHR) || device->keep_shader_info;
radv_start_feedback(pipeline_feedback);
@ -2778,14 +2779,14 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
gs_copy_hash[0] ^= 1;
bool found_in_application_cache = true;
if (modules[MESA_SHADER_GEOMETRY] && !keep_executable_info) {
if (modules[MESA_SHADER_GEOMETRY] && !keep_executable_info && !keep_statistic_info) {
struct radv_shader_variant *variants[MESA_SHADER_STAGES] = {0};
radv_create_shader_variants_from_pipeline_cache(device, cache, gs_copy_hash, variants,
&found_in_application_cache);
pipeline->gs_copy_shader = variants[MESA_SHADER_GEOMETRY];
}
if (!keep_executable_info &&
if (!keep_executable_info && !keep_statistic_info &&
radv_create_shader_variants_from_pipeline_cache(device, cache, hash, pipeline->shaders,
&found_in_application_cache) &&
(!modules[MESA_SHADER_GEOMETRY] || pipeline->gs_copy_shader)) {
@ -2910,11 +2911,11 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
pipeline->gs_copy_shader = radv_create_gs_copy_shader(
device, nir[MESA_SHADER_GEOMETRY], &info,
&gs_copy_binary, keep_executable_info,
&gs_copy_binary, keep_executable_info, keep_statistic_info,
keys[MESA_SHADER_GEOMETRY].has_multiview_view_index);
}
if (!keep_executable_info && pipeline->gs_copy_shader) {
if (!keep_executable_info && !keep_statistic_info && pipeline->gs_copy_shader) {
struct radv_shader_binary *binaries[MESA_SHADER_STAGES] = {NULL};
struct radv_shader_variant *variants[MESA_SHADER_STAGES] = {0};
@ -2937,7 +2938,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
radv_shader_variant_compile(device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1,
pipeline->layout, keys + MESA_SHADER_FRAGMENT,
infos + MESA_SHADER_FRAGMENT,
keep_executable_info,
keep_executable_info, keep_statistic_info,
&binaries[MESA_SHADER_FRAGMENT]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT], false);
@ -2955,7 +2956,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_variant_compile(device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2,
pipeline->layout,
&key, &infos[MESA_SHADER_TESS_CTRL], keep_executable_info,
&binaries[MESA_SHADER_TESS_CTRL]);
keep_statistic_info, &binaries[MESA_SHADER_TESS_CTRL]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL], false);
}
@ -2974,7 +2975,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_variant_compile(device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2,
pipeline->layout,
&keys[pre_stage], &infos[MESA_SHADER_GEOMETRY], keep_executable_info,
&binaries[MESA_SHADER_GEOMETRY]);
keep_statistic_info, &binaries[MESA_SHADER_GEOMETRY]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY], false);
}
@ -2995,14 +2996,14 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
pipeline->shaders[i] = radv_shader_variant_compile(device, modules[i], &nir[i], 1,
pipeline->layout,
keys + i, infos + i,keep_executable_info,
&binaries[i]);
keys + i, infos + i, keep_executable_info,
keep_statistic_info, &binaries[i]);
radv_stop_feedback(stage_feedbacks[i], false);
}
}
if (!keep_executable_info) {
if (!keep_executable_info && !keep_statistic_info) {
radv_pipeline_cache_insert_shaders(device, cache, hash, pipeline->shaders,
binaries);
}

10
src/amd/vulkan/radv_shader.c
View file

@ -1077,6 +1077,7 @@ shader_variant_compile(struct radv_device *device,
struct radv_nir_compiler_options *options,
bool gs_copy_shader,
bool keep_shader_info,
bool keep_statistic_info,
struct radv_shader_binary **binary_out)
{
enum radeon_family chip_family = device->physical_device->rad_info.family;
@ -1088,6 +1089,7 @@ shader_variant_compile(struct radv_device *device,
options->dump_preoptir = options->dump_shader &&
device->instance->debug_flags & RADV_DEBUG_PREOPTIR;
options->record_ir = keep_shader_info;
options->record_stats = keep_statistic_info;
options->check_ir = device->instance->debug_flags & RADV_DEBUG_CHECKIR;
options->tess_offchip_block_dw_size = device->tess_offchip_block_dw_size;
options->address32_hi = device->physical_device->rad_info.address32_hi;
@ -1160,7 +1162,7 @@ radv_shader_variant_compile(struct radv_device *device,
struct radv_pipeline_layout *layout,
const struct radv_shader_variant_key *key,
struct radv_shader_info *info,
bool keep_shader_info,
bool keep_shader_info, bool keep_statistic_info,
struct radv_shader_binary **binary_out)
{
struct radv_nir_compiler_options options = {0};
@ -1173,7 +1175,7 @@ radv_shader_variant_compile(struct radv_device *device,
options.robust_buffer_access = device->robust_buffer_access;
return shader_variant_compile(device, module, shaders, shader_count, shaders[shader_count - 1]->info.stage, info,
&options, false, keep_shader_info, binary_out);
&options, false, keep_shader_info, keep_statistic_info, binary_out);
}
struct radv_shader_variant *
@ -1181,7 +1183,7 @@ radv_create_gs_copy_shader(struct radv_device *device,
struct nir_shader *shader,
struct radv_shader_info *info,
struct radv_shader_binary **binary_out,
bool keep_shader_info,
bool keep_shader_info, bool keep_statistic_info,
bool multiview)
{
struct radv_nir_compiler_options options = {0};
@ -1190,7 +1192,7 @@ radv_create_gs_copy_shader(struct radv_device *device,
options.key.has_multiview_view_index = multiview;
return shader_variant_compile(device, NULL, &shader, 1, MESA_SHADER_VERTEX,
info, &options, true, keep_shader_info, binary_out);
info, &options, true, keep_shader_info, keep_statistic_info, binary_out);
}
void

6
src/amd/vulkan/radv_shader.h
View file

@ -132,6 +132,7 @@ struct radv_nir_compiler_options {
bool dump_shader;
bool dump_preoptir;
bool record_ir;
bool record_stats;
bool check_ir;
bool has_ls_vgpr_init_bug;
bool use_ngg_streamout;
@ -449,14 +450,15 @@ radv_shader_variant_compile(struct radv_device *device,
struct radv_pipeline_layout *layout,
const struct radv_shader_variant_key *key,
struct radv_shader_info *info,
bool keep_shader_info,
bool keep_shader_info, bool keep_statistic_info,
struct radv_shader_binary **binary_out);
struct radv_shader_variant *
radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir,
struct radv_shader_info *info,
struct radv_shader_binary **binary_out,
bool multiview, bool keep_shader_info);
bool multiview, bool keep_shader_info,
bool keep_statistic_info);
void
radv_shader_variant_destroy(struct radv_device *device,