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radeonsi: implement two lds base load intrinsics

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LDS will be accessed starting from esgs_ring which has offset 0.
So ngg_scratch and ngg_emit base address is just the offset from
the esgs_ring base.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17109>
This commit is contained in:
Qiang Yu 2022-07-22 20:01:26 +08:00 • committed by Marge Bot
parent 7bc56911f8
commit 7e1b804992
2 changed files with 8 additions and 0 deletions
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2
src/amd/llvm/ac_nir_to_llvm.c
View file

@ -3645,6 +3645,8 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
case nir_intrinsic_load_prim_gen_query_enabled_amd:
case nir_intrinsic_load_prim_xfb_query_enabled_amd:
case nir_intrinsic_load_clamp_vertex_color_amd:
case nir_intrinsic_load_lds_ngg_scratch_base_amd:
case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd:
result = ctx->abi->intrinsic_load(ctx->abi, instr->intrinsic);
break;
case nir_intrinsic_load_user_clip_plane:

6
src/gallium/drivers/radeonsi/si_shader_llvm.c
View file

@ -922,6 +922,12 @@ static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrin
case nir_intrinsic_load_ring_attr_amd:
return si_llvm_build_attr_ring_desc(ctx);
case nir_intrinsic_load_lds_ngg_scratch_base_amd:
return LLVMBuildBitCast(ctx->ac.builder, ctx->gs_ngg_scratch.value, ctx->ac.i32, "");
case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd:
return LLVMBuildBitCast(ctx->ac.builder, ctx->gs_ngg_emit, ctx->ac.i32, "");
default:
return NULL;
}