iris: Fix pipe control around fast-clears

Use the right pipe control helper function so that texture invalidates
occur after the end-of-pipe sync rather than during.

Fixes: 23658920d1 ("anv,iris: Skip tex invalidate for clear conversion")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12550
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 18e67d853f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
This commit is contained in:
Nanley Chery 2025-12-12 13:46:07 -05:00 committed by Dylan Baker
parent d1dfae23c5
commit 7de72fc3a6
2 changed files with 23 additions and 9 deletions

View file

@ -24,7 +24,7 @@
"description": "iris: Fix pipe control around fast-clears",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "23658920d138fc12b730a320325d8f5f1a9978bd",
"notes": null

View file

@ -280,14 +280,28 @@ fast_clear_color(struct iris_context *ice,
* and again afterwards to ensure that the resolve is complete before we
* do any more regular drawing.
*/
iris_emit_end_of_pipe_sync(batch, "fast clear: pre-flush",
PIPE_CONTROL_RENDER_TARGET_FLUSH |
(devinfo->ver == 12 ? PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
PIPE_CONTROL_TILE_CACHE_FLUSH : 0) |
(devinfo->verx10 == 120 ? PIPE_CONTROL_DEPTH_STALL : 0) |
(devinfo->verx10 == 125 ? PIPE_CONTROL_FLUSH_HDC |
PIPE_CONTROL_DATA_CACHE_FLUSH : 0) |
PIPE_CONTROL_PSS_STALL_SYNC);
if (devinfo->ver >= 20) {
iris_emit_pipe_control_flush(batch, "fast clear: pre-flush",
PIPE_CONTROL_RENDER_TARGET_FLUSH |
PIPE_CONTROL_PSS_STALL_SYNC);
} else if (devinfo->verx10 >= 125) {
iris_emit_pipe_control_flush(batch, "fast clear: pre-flush",
PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
PIPE_CONTROL_DATA_CACHE_FLUSH |
PIPE_CONTROL_FLUSH_HDC |
PIPE_CONTROL_RENDER_TARGET_FLUSH |
PIPE_CONTROL_TILE_CACHE_FLUSH |
PIPE_CONTROL_PSS_STALL_SYNC);
} else if (devinfo->verx10 >= 120) {
iris_emit_pipe_control_flush(batch, "fast clear: pre-flush",
PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
PIPE_CONTROL_RENDER_TARGET_FLUSH |
PIPE_CONTROL_TILE_CACHE_FLUSH |
PIPE_CONTROL_DEPTH_STALL);
} else {
iris_emit_end_of_pipe_sync(batch, "fast clear: pre-flush",
PIPE_CONTROL_RENDER_TARGET_FLUSH);
}
/* Update the clear color now that previous rendering is complete. */
if (color_changed && res->aux.clear_color_bo)