From 7dd66d6bb1c25c1941d974c9c2351cec5e69432b Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Thu, 11 Sep 2025 17:20:02 -0700 Subject: [PATCH] isl: allow sparse with CCS on Xe2 and newer When the auxiliary surface is handled by the hardware directly, there's nothing to bind besides the main pixels, so we can allow sparse without doing anything else. We can't do this in the exact same way with DG2 (which has_flat_ccs) because it uses the aux_state_tracking_buffer. v2: Fix spelling (Nanley). Reviewed-by: Nanley Chery Signed-off-by: Paulo Zanoni Part-of: --- src/intel/isl/isl.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index a994ecf7851..a416fb5da02 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -3877,7 +3877,10 @@ _isl_surf_info_supports_ccs(const struct isl_device *dev, if (usage & ISL_SURF_USAGE_STAGING_BIT) return false; - if (usage & ISL_SURF_USAGE_SPARSE_BIT) + /* Xe2 and newer don't require additional space to be allocated by the + * driver for plain CCS, so we can trivially allow sparse. + */ + if (ISL_GFX_VER(dev) < 20 && (usage & ISL_SURF_USAGE_SPARSE_BIT)) return false; if (usage & ISL_SURF_USAGE_DISABLE_AUX_BIT)