mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-01 05:58:05 +02:00
gallium/radeon: boolean -> bool, TRUE -> true, FALSE -> false
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Vedran Miletić <vedran@miletic.net> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
parent
1c5a10497a
commit
7db10093d3
9 changed files with 75 additions and 75 deletions
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@ -30,18 +30,18 @@
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#include <inttypes.h>
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#include <stdio.h>
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boolean r600_rings_is_buffer_referenced(struct r600_common_context *ctx,
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struct pb_buffer *buf,
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enum radeon_bo_usage usage)
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bool r600_rings_is_buffer_referenced(struct r600_common_context *ctx,
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struct pb_buffer *buf,
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enum radeon_bo_usage usage)
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{
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if (ctx->ws->cs_is_buffer_referenced(ctx->gfx.cs, buf, usage)) {
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return TRUE;
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return true;
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}
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if (radeon_emitted(ctx->dma.cs, 0) &&
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ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, buf, usage)) {
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return TRUE;
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return true;
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}
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return FALSE;
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return false;
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}
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void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx,
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@ -418,8 +418,8 @@ error:
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return NULL;
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}
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static boolean r600_init_block_names(struct r600_common_screen *screen,
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struct r600_perfcounter_block *block)
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static bool r600_init_block_names(struct r600_common_screen *screen,
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struct r600_perfcounter_block *block)
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{
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unsigned i, j, k;
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unsigned groups_shader = 1, groups_se = 1, groups_instance = 1;
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@ -452,7 +452,7 @@ static boolean r600_init_block_names(struct r600_common_screen *screen,
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block->group_names = MALLOC(block->num_groups * block->group_name_stride);
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if (!block->group_names)
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return FALSE;
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return false;
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groupname = block->group_names;
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for (i = 0; i < groups_shader; ++i) {
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@ -487,7 +487,7 @@ static boolean r600_init_block_names(struct r600_common_screen *screen,
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block->selector_names = MALLOC(block->num_groups * block->num_selectors *
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block->selector_name_stride);
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if (!block->selector_names)
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return FALSE;
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return false;
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groupname = block->group_names;
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p = block->selector_names;
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@ -499,7 +499,7 @@ static boolean r600_init_block_names(struct r600_common_screen *screen,
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groupname += block->group_name_stride;
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}
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return TRUE;
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return true;
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}
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int r600_get_perfcounter_info(struct r600_common_screen *screen,
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@ -577,17 +577,17 @@ void r600_perfcounters_destroy(struct r600_common_screen *rscreen)
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rscreen->perfcounters->cleanup(rscreen);
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}
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boolean r600_perfcounters_init(struct r600_perfcounters *pc,
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unsigned num_blocks)
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bool r600_perfcounters_init(struct r600_perfcounters *pc,
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unsigned num_blocks)
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{
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pc->blocks = CALLOC(num_blocks, sizeof(struct r600_perfcounter_block));
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if (!pc->blocks)
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return FALSE;
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return false;
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pc->separate_se = debug_get_bool_option("RADEON_PC_SEPARATE_SE", FALSE);
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pc->separate_instance = debug_get_bool_option("RADEON_PC_SEPARATE_INSTANCE", FALSE);
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pc->separate_se = debug_get_bool_option("RADEON_PC_SEPARATE_SE", false);
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pc->separate_instance = debug_get_bool_option("RADEON_PC_SEPARATE_INSTANCE", false);
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return TRUE;
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return true;
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}
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void r600_perfcounters_add_block(struct r600_common_screen *rscreen,
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@ -446,7 +446,7 @@ bool r600_common_context_init(struct r600_common_context *rctx,
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rctx->allocator_zeroed_memory =
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u_suballocator_create(&rctx->b, rscreen->info.gart_page_size,
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0, PIPE_USAGE_DEFAULT, TRUE);
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0, PIPE_USAGE_DEFAULT, true);
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if (!rctx->allocator_zeroed_memory)
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return false;
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@ -243,7 +243,7 @@ struct r600_texture {
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unsigned dirty_level_mask; /* each bit says if that mipmap is compressed */
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unsigned stencil_dirty_level_mask; /* each bit says if that mipmap is compressed */
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struct r600_texture *flushed_depth_texture;
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boolean is_flushing_texture;
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bool is_flushing_texture;
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struct radeon_surf surface;
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/* Colorbuffer compression and fast clear. */
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@ -524,7 +524,7 @@ struct r600_common_context {
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struct r600_atom render_cond_atom;
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struct pipe_query *render_cond;
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unsigned render_cond_mode;
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boolean render_cond_invert;
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bool render_cond_invert;
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bool render_cond_force_off; /* for u_blitter */
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/* MSAA sample locations.
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@ -586,9 +586,9 @@ struct r600_common_context {
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};
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/* r600_buffer.c */
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boolean r600_rings_is_buffer_referenced(struct r600_common_context *ctx,
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struct pb_buffer *buf,
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enum radeon_bo_usage usage);
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bool r600_rings_is_buffer_referenced(struct r600_common_context *ctx,
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struct pb_buffer *buf,
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enum radeon_bo_usage usage);
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void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx,
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struct r600_resource *resource,
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unsigned usage);
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@ -63,8 +63,8 @@ static enum radeon_value_id winsys_id_from_type(unsigned type)
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}
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}
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static boolean r600_query_sw_begin(struct r600_common_context *rctx,
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struct r600_query *rquery)
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static bool r600_query_sw_begin(struct r600_common_context *rctx,
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struct r600_query *rquery)
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{
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struct r600_query_sw *query = (struct r600_query_sw *)rquery;
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@ -122,7 +122,7 @@ static boolean r600_query_sw_begin(struct r600_common_context *rctx,
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unreachable("r600_query_sw_begin: bad query type");
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}
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return TRUE;
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return true;
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}
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static bool r600_query_sw_end(struct r600_common_context *rctx,
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@ -189,10 +189,10 @@ static bool r600_query_sw_end(struct r600_common_context *rctx,
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return true;
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}
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static boolean r600_query_sw_get_result(struct r600_common_context *rctx,
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struct r600_query *rquery,
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boolean wait,
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union pipe_query_result *result)
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static bool r600_query_sw_get_result(struct r600_common_context *rctx,
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struct r600_query *rquery,
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bool wait,
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union pipe_query_result *result)
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{
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struct r600_query_sw *query = (struct r600_query_sw *)rquery;
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@ -201,8 +201,8 @@ static boolean r600_query_sw_get_result(struct r600_common_context *rctx,
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/* Convert from cycles per millisecond to cycles per second (Hz). */
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result->timestamp_disjoint.frequency =
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(uint64_t)rctx->screen->info.clock_crystal_freq * 1000;
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result->timestamp_disjoint.disjoint = FALSE;
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return TRUE;
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result->timestamp_disjoint.disjoint = false;
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return true;
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case PIPE_QUERY_GPU_FINISHED: {
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struct pipe_screen *screen = rctx->b.screen;
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result->b = screen->fence_finish(screen, query->fence,
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@ -212,19 +212,19 @@ static boolean r600_query_sw_get_result(struct r600_common_context *rctx,
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case R600_QUERY_GPIN_ASIC_ID:
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result->u32 = 0;
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return TRUE;
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return true;
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case R600_QUERY_GPIN_NUM_SIMD:
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result->u32 = rctx->screen->info.num_good_compute_units;
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return TRUE;
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return true;
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case R600_QUERY_GPIN_NUM_RB:
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result->u32 = rctx->screen->info.num_render_backends;
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return TRUE;
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return true;
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case R600_QUERY_GPIN_NUM_SPI:
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result->u32 = 1; /* all supported chips have one SPI per SE */
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return TRUE;
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return true;
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case R600_QUERY_GPIN_NUM_SE:
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result->u32 = rctx->screen->info.max_se;
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return TRUE;
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return true;
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}
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result->u64 = query->end_result - query->begin_result;
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@ -240,7 +240,7 @@ static boolean r600_query_sw_get_result(struct r600_common_context *rctx,
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break;
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}
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return TRUE;
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return true;
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}
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static struct r600_query_ops sw_query_ops = {
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@ -372,14 +372,14 @@ static struct r600_query_hw_ops query_hw_default_hw_ops = {
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.add_result = r600_query_hw_add_result,
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};
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boolean r600_query_hw_init(struct r600_common_context *rctx,
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struct r600_query_hw *query)
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bool r600_query_hw_init(struct r600_common_context *rctx,
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struct r600_query_hw *query)
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{
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query->buffer.buf = r600_new_query_buffer(rctx, query);
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if (!query->buffer.buf)
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return FALSE;
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return false;
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return TRUE;
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return true;
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}
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static struct pipe_query *r600_query_hw_create(struct r600_common_context *rctx,
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@ -538,7 +538,7 @@ static void r600_query_hw_emit_start(struct r600_common_context *ctx,
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r600_update_prims_generated_query_state(ctx, query->b.type, 1);
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ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw_begin + query->num_cs_dw_end,
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TRUE);
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true);
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/* Get a new query buffer if needed. */
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if (query->buffer.results_end + query->result_size > query->buffer.buf->b.b.width0) {
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@ -620,7 +620,7 @@ static void r600_query_hw_emit_stop(struct r600_common_context *ctx,
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/* The queries which need begin already called this in begin_query. */
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if (query->flags & R600_QUERY_HW_FLAG_NO_START) {
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ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw_end, FALSE);
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ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw_end, false);
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}
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/* emit end query */
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@ -753,8 +753,8 @@ static void r600_query_hw_reset_buffers(struct r600_common_context *rctx,
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}
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}
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boolean r600_query_hw_begin(struct r600_common_context *rctx,
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struct r600_query *rquery)
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bool r600_query_hw_begin(struct r600_common_context *rctx,
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struct r600_query *rquery)
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{
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struct r600_query_hw *query = (struct r600_query_hw *)rquery;
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@ -956,9 +956,9 @@ static void r600_query_hw_clear_result(struct r600_query_hw *query,
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util_query_clear_result(result, query->b.type);
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}
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boolean r600_query_hw_get_result(struct r600_common_context *rctx,
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struct r600_query *rquery,
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boolean wait, union pipe_query_result *result)
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bool r600_query_hw_get_result(struct r600_common_context *rctx,
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struct r600_query *rquery,
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bool wait, union pipe_query_result *result)
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{
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struct r600_query_hw *query = (struct r600_query_hw *)rquery;
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struct r600_query_buffer *qbuf;
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@ -973,7 +973,7 @@ boolean r600_query_hw_get_result(struct r600_common_context *rctx,
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PIPE_TRANSFER_READ |
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(wait ? 0 : PIPE_TRANSFER_DONTBLOCK));
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if (!map)
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return FALSE;
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return false;
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while (results_base != qbuf->results_end) {
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query->ops->add_result(rctx, query, map + results_base,
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@ -987,7 +987,7 @@ boolean r600_query_hw_get_result(struct r600_common_context *rctx,
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rquery->type == PIPE_QUERY_TIMESTAMP) {
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result->u64 = (1000000 * result->u64) / rctx->screen->info.clock_crystal_freq;
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}
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return TRUE;
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return true;
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}
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static void r600_render_condition(struct pipe_context *ctx,
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@ -1057,7 +1057,7 @@ void r600_resume_queries(struct r600_common_context *ctx)
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assert(ctx->num_cs_dw_queries_suspend == 0);
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/* Check CS space here. Resuming must not be interrupted by flushes. */
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ctx->need_gfx_cs_space(&ctx->b, num_cs_dw, TRUE);
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ctx->need_gfx_cs_space(&ctx->b, num_cs_dw, true);
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LIST_FOR_EACH_ENTRY(query, &ctx->active_queries, list) {
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r600_query_hw_emit_start(ctx, query);
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@ -75,11 +75,11 @@ enum {
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struct r600_query_ops {
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void (*destroy)(struct r600_common_context *, struct r600_query *);
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boolean (*begin)(struct r600_common_context *, struct r600_query *);
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bool (*begin)(struct r600_common_context *, struct r600_query *);
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bool (*end)(struct r600_common_context *, struct r600_query *);
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boolean (*get_result)(struct r600_common_context *,
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struct r600_query *, boolean wait,
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union pipe_query_result *result);
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bool (*get_result)(struct r600_common_context *,
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struct r600_query *, bool wait,
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union pipe_query_result *result);
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};
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struct r600_query {
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@ -140,18 +140,18 @@ struct r600_query_hw {
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unsigned stream;
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};
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boolean r600_query_hw_init(struct r600_common_context *rctx,
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struct r600_query_hw *query);
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bool r600_query_hw_init(struct r600_common_context *rctx,
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struct r600_query_hw *query);
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void r600_query_hw_destroy(struct r600_common_context *rctx,
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struct r600_query *rquery);
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boolean r600_query_hw_begin(struct r600_common_context *rctx,
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struct r600_query *rquery);
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bool r600_query_hw_begin(struct r600_common_context *rctx,
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struct r600_query *rquery);
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bool r600_query_hw_end(struct r600_common_context *rctx,
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struct r600_query *rquery);
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boolean r600_query_hw_get_result(struct r600_common_context *rctx,
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struct r600_query *rquery,
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boolean wait,
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union pipe_query_result *result);
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bool r600_query_hw_get_result(struct r600_common_context *rctx,
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struct r600_query *rquery,
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bool wait,
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union pipe_query_result *result);
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/* Performance counters */
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enum {
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@ -233,8 +233,8 @@ struct r600_perfcounters {
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void (*cleanup)(struct r600_common_screen *);
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boolean separate_se;
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boolean separate_instance;
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bool separate_se;
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bool separate_instance;
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};
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struct pipe_query *r600_create_batch_query(struct pipe_context *ctx,
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@ -248,7 +248,7 @@ int r600_get_perfcounter_group_info(struct r600_common_screen *,
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unsigned index,
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struct pipe_driver_query_group_info *info);
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boolean r600_perfcounters_init(struct r600_perfcounters *, unsigned num_blocks);
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bool r600_perfcounters_init(struct r600_perfcounters *, unsigned num_blocks);
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void r600_perfcounters_add_block(struct r600_common_screen *,
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struct r600_perfcounters *,
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const char *name, unsigned flags,
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@ -1274,7 +1274,7 @@ bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
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return false;
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}
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(*flushed_depth_texture)->is_flushing_texture = TRUE;
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(*flushed_depth_texture)->is_flushing_texture = true;
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(*flushed_depth_texture)->non_disp_tiling = false;
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return true;
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}
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@ -1746,7 +1746,7 @@ static void vi_get_fast_clear_parameters(enum pipe_format surface_format,
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surface_format == PIPE_FORMAT_B5G6R5_SRGB) {
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extra_channel = -1;
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} else if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN) {
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if(r600_translate_colorswap(surface_format, FALSE) <= 1)
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if(r600_translate_colorswap(surface_format, false) <= 1)
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extra_channel = desc->nr_channels - 1;
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else
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extra_channel = 0;
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@ -404,7 +404,7 @@ void radeon_llvm_emit_store(
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LLVMBuilderRef builder = bld->bld_base.base.gallivm->builder;
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LLVMValueRef temp_ptr, temp_ptr2 = NULL;
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unsigned chan, chan_index;
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boolean is_vec_store = FALSE;
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bool is_vec_store = false;
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enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
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if (dst[0]) {
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@ -1557,10 +1557,10 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx, const char *trip
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struct lp_build_tgsi_context * bld_base = &ctx->soa.bld_base;
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type.floating = TRUE;
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type.fixed = FALSE;
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type.sign = TRUE;
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type.norm = FALSE;
|
||||
type.floating = true;
|
||||
type.fixed = false;
|
||||
type.sign = true;
|
||||
type.norm = false;
|
||||
type.width = 32;
|
||||
type.length = 1;
|
||||
|
||||
|
|
|
|||
|
|
@ -1124,7 +1124,7 @@ struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
|
|||
return NULL;
|
||||
|
||||
if (info.drm_major < 3)
|
||||
dec->use_legacy = TRUE;
|
||||
dec->use_legacy = true;
|
||||
|
||||
dec->base = *templ;
|
||||
dec->base.context = context;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue