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i965: Fix cube map layouts on Ironlake.

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We were doubling up the offsets for the mipmap levels for CPU access.
Instead of reimplementing i945_miptree_layout_2d with 6 cube images
separated by qpitch, share that function and provide the level offsets
later.

Fixes piglit cubemap and fbo-cubemap.
This commit is contained in:
Eric Anholt 2010-04-28 17:17:54 -07:00
parent d05c35914d
commit 7d8f0fc282
4 changed files with 24 additions and 68 deletions
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2
src/mesa/drivers/dri/i915/i915_tex_layout.c
View file

@ -483,7 +483,7 @@ i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
case GL_TEXTURE_1D:
case GL_TEXTURE_2D:
case GL_TEXTURE_RECTANGLE_ARB:
i945_miptree_layout_2d(intel, mt, tiling);
i945_miptree_layout_2d(intel, mt, tiling, 1);
break;
default:
_mesa_problem(NULL, "Unexpected tex target in i945_miptree_layout()");

80
src/mesa/drivers/dri/i965/brw_tex_layout.c
View file

@ -49,74 +49,30 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
switch (mt->target) {
case GL_TEXTURE_CUBE_MAP:
if (intel->gen == 5) {
GLuint align_h = 2, align_w = 4;
GLuint align_h = 2;
GLuint level;
GLuint x = 0;
GLuint y = 0;
GLuint width = mt->width0;
GLuint height = mt->height0;
GLuint qpitch = 0;
GLuint y_pitch = 0;
int h0, h1, q;
mt->total_width = mt->width0;
intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
y_pitch = ALIGN(height, align_h);
/* On Ironlake, cube maps are finally represented as just a series
* of MIPLAYOUT_BELOW 2D textures (like 2D texture arrays), separated
* by a pitch of qpitch rows, where qpitch is defined by the equation
* given in Volume 1 of the BSpec.
*/
h0 = ALIGN(mt->height0, align_h);
h1 = ALIGN(minify(h0), align_h);
qpitch = (h0 + h1 + 11 * align_h);
if (mt->compressed)
qpitch /= 4;
if (mt->compressed) {
mt->total_width = ALIGN(mt->width0, align_w);
}
if (mt->first_level != mt->last_level) {
GLuint mip1_width;
if (mt->compressed) {
mip1_width = ALIGN(minify(mt->width0), align_w)
+ ALIGN(minify(minify(mt->width0)), align_w);
} else {
mip1_width = ALIGN(minify(mt->width0), align_w)
+ minify(minify(mt->width0));
}
if (mip1_width > mt->total_width) {
mt->total_width = mip1_width;
}
}
if (mt->compressed) {
qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4;
mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * 6;
} else {
qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h);
mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * 6;
}
i945_miptree_layout_2d(intel, mt, tiling, 6);
for (level = mt->first_level; level <= mt->last_level; level++) {
GLuint img_height;
GLuint nr_images = 6;
GLuint q = 0;
intel_miptree_set_level_info(mt, level, nr_images, x, y, width,
height, 1);
for (q = 0; q < nr_images; q++)
intel_miptree_set_image_offset(mt, level, q,
x, y + q * qpitch);
if (mt->compressed)
img_height = MAX2(1, height/4);
else
img_height = ALIGN(height, align_h);
if (level == mt->first_level + 1) {
x += ALIGN(width, align_w);
}
else {
y += img_height;
}
width = minify(width);
height = minify(height);
for (q = 0; q < 6; q++) {
intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch);
}
}
mt->total_height = qpitch * 6;
break;
}
@ -206,7 +162,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
}
default:
i945_miptree_layout_2d(intel, mt, tiling);
i945_miptree_layout_2d(intel, mt, tiling, 1);
break;
}
DBG("%s: %dx%dx%d\n", __FUNCTION__,

8
src/mesa/drivers/dri/intel/intel_tex_layout.c
View file

@ -63,9 +63,9 @@ void intel_get_texture_alignment_unit(GLenum internalFormat, GLuint *w, GLuint *
}
}
void i945_miptree_layout_2d( struct intel_context *intel,
struct intel_mipmap_tree *mt,
uint32_t tiling )
void i945_miptree_layout_2d(struct intel_context *intel,
struct intel_mipmap_tree *mt,
uint32_t tiling, int nr_images)
{
GLuint align_h = 2, align_w = 4;
GLuint level;
@ -107,7 +107,7 @@ void i945_miptree_layout_2d( struct intel_context *intel,
for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
GLuint img_height;
intel_miptree_set_level_info(mt, level, 1, x, y, width,
intel_miptree_set_level_info(mt, level, nr_images, x, y, width,
height, 1);
if (mt->compressed)

2
src/mesa/drivers/dri/intel/intel_tex_layout.h
View file

@ -40,5 +40,5 @@ static INLINE GLuint minify( GLuint d )
extern void i945_miptree_layout_2d(struct intel_context *intel,
struct intel_mipmap_tree *mt,
uint32_t tiling);
uint32_t tiling, int nr_images);
extern void intel_get_texture_alignment_unit(GLenum, GLuint *, GLuint *);