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Clarify some of the unkXXXX atoms.

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This commit is contained in:
Vladimir Dergachev 2004-12-30 07:11:28 +00:00
parent 74bf43051c
commit 7d8c1fb03a
3 changed files with 43 additions and 15 deletions
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15
src/mesa/drivers/dri/r300/r300_cmdbuf.c
View file

@ -304,12 +304,14 @@ void r300InitCmdBuf(r300ContextPtr r300)
r300->hw.unk2220.cmd[0] = cmducs(0x2220, 4);
ALLOC_STATE( unk2288, always, 2, "unk2288", 0 );
r300->hw.unk2288.cmd[0] = cmducs(0x2288, 1);
ALLOC_STATE( vof, always, R300_VOF_CMDSIZE, "vof", 0 );
r300->hw.vof.cmd[R300_VOF_CMD_0] = cmducs(R300_VAP_OUTPUT_VTX_FMT_0, 2);
ALLOC_STATE( pvs, always, R300_PVS_CMDSIZE, "pvs", 0 );
r300->hw.pvs.cmd[R300_PVS_CMD_0] = cmducs(R300_VAP_PVS_CNTL_1, 3);
ALLOC_STATE( unk4008, always, 2, "unk4008", 0 );
r300->hw.unk4008.cmd[0] = cmducs(0x4008, 1);
ALLOC_STATE( unk4010, always, 6, "unk4010", 0 );
r300->hw.unk4010.cmd[0] = cmducs(0x4010, 5);
ALLOC_STATE( gb_enable, always, 2, "gb_enable", 0 );
r300->hw.gb_enable.cmd[0] = cmducs(R300_GB_ENABLE, 1);
ALLOC_STATE( gb_misc, always, R300_GB_MISC_CMDSIZE, "gb_misc", 0 );
r300->hw.gb_misc.cmd[0] = cmducs(R300_GB_MSPOS0, 5);
ALLOC_STATE( txe, always, R300_TXE_CMDSIZE, "txe", 0 );
r300->hw.txe.cmd[R300_TXE_CMD_0] = cmducs(R300_TX_ENABLE, 1);
ALLOC_STATE( unk4200, always, 5, "unk4200", 0 );
@ -421,9 +423,10 @@ void r300InitCmdBuf(r300ContextPtr r300)
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk221C);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2220);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2288);
insert_at_tail(&r300->hw.atomlist, &r300->hw.vof);
insert_at_tail(&r300->hw.atomlist, &r300->hw.pvs);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4008);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4010);
insert_at_tail(&r300->hw.atomlist, &r300->hw.gb_enable);
insert_at_tail(&r300->hw.atomlist, &r300->hw.gb_misc);
insert_at_tail(&r300->hw.atomlist, &r300->hw.txe);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4200);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4214);

19
src/mesa/drivers/dri/r300/r300_context.h
View file

@ -115,12 +115,26 @@ struct r300_state_atom {
#define R300_VIC_CNTL_1 2
#define R300_VIC_CMDSIZE 3
#define R300_VOF_CMD_0 0
#define R300_VOF_CNTL_0 1
#define R300_VOF_CNTL_1 2
#define R300_VOF_CMDSIZE 3
#define R300_PVS_CMD_0 0
#define R300_PVS_CNTL_1 1
#define R300_PVS_CNTL_2 2
#define R300_PVS_CNTL_3 3
#define R300_PVS_CMDSIZE 4
#define R300_GB_MISC_CMD_0 0
#define R300_GB_MISC_MSPOS_0 1
#define R300_GB_MISC_MSPOS_1 2
#define R300_GB_MISC_TILE_CONFIG 3
#define R300_GB_MISC_SELECT 4
#define R300_GB_MISC_AA_CONFIG 5
#define R300_GB_MISC_CMDSIZE 6
#define R300_TXE_CMD_0 0
#define R300_TXE_ENABLE 1
#define R300_TXE_CMDSIZE 2
@ -242,8 +256,9 @@ struct r300_hw_state {
struct r300_state_atom unk2220; /* (2220) */
struct r300_state_atom unk2288; /* (2288) */
struct r300_state_atom pvs; /* pvs_cntl (22D0) */
struct r300_state_atom unk4008; /* (4008) */
struct r300_state_atom unk4010; /* (4010) */
struct r300_state_atom vof; /* VAP output format register 0x4000 */
struct r300_state_atom gb_enable; /* (4008) */
struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */
struct r300_state_atom txe; /* tex enable (4104) */
struct r300_state_atom unk4200; /* (4200) */
struct r300_state_atom unk4214; /* (4214) */

24
src/mesa/drivers/dri/r300/r300_state.c
View file

@ -358,20 +358,30 @@ void r300ResetHwState(r300ContextPtr r300)
else
r300->hw.unk2288.cmd[1] = R300_2288_RV350;
r300->hw.vof.cmd[R300_VOF_CNTL_0] = R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
| R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
r300->hw.vof.cmd[R300_VOF_CNTL_1] = 0; /* no textures */
r300->hw.pvs.cmd[R300_PVS_CNTL_1] = 0;
r300->hw.pvs.cmd[R300_PVS_CNTL_2] = 0;
r300->hw.pvs.cmd[R300_PVS_CNTL_3] = 0;
r300->hw.unk4008.cmd[1] = 0x00000007;
r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
| R300_GB_LINE_STUFF_ENABLE
| R300_GB_TRIANGLE_STUFF_ENABLE;
r300->hw.unk4010.cmd[1] = 0x66666666;
r300->hw.unk4010.cmd[2] = 0x06666666;
r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
r300->hw.unk4010.cmd[3] = 0x00000017;
r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
| R300_GB_TILE_PIPE_COUNT_R300
| R300_GB_TILE_SIZE_16;
else
r300->hw.unk4010.cmd[3] = 0x00000011;
r300->hw.unk4010.cmd[4] = 0x00000000;
r300->hw.unk4010.cmd[5] = 0x00000000;
r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
| R300_GB_TILE_PIPE_COUNT_RV300
| R300_GB_TILE_SIZE_16;
r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0x00000000;
r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = 0x00000000; /* No antialiasing */
r300->hw.txe.cmd[R300_TXE_ENABLE] = 0;