From 7d7c56e61a052cabcdf986abacf76506c8da086b Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Thu, 24 Mar 2022 17:17:17 +0100 Subject: [PATCH] radeonsi: drop LLVM global instruction selector MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I'm not sure if this is really used by anyone? Reviewed-by: Marek Olšák Part-of: --- docs/envvars.rst | 2 -- src/amd/llvm/ac_llvm_helper.cpp | 5 ----- src/amd/llvm/ac_llvm_util.c | 7 +------ src/amd/llvm/ac_llvm_util.h | 4 +--- src/gallium/drivers/radeonsi/si_pipe.c | 2 -- src/gallium/drivers/radeonsi/si_pipe.h | 1 - src/gallium/drivers/radeonsi/si_state_shaders.cpp | 2 -- 7 files changed, 2 insertions(+), 21 deletions(-) diff --git a/docs/envvars.rst b/docs/envvars.rst index 874e6c15715..b8f5efb915a 100644 --- a/docs/envvars.rst +++ b/docs/envvars.rst @@ -823,8 +823,6 @@ radeonsi driver environment variables Don't print disassembled shaders ``preoptir`` Print the LLVM IR before initial optimizations - ``gisel`` - Enable LLVM global instruction selector. ``w32ge`` Use Wave32 for vertex, tessellation, and geometry shaders. ``w32ps`` diff --git a/src/amd/llvm/ac_llvm_helper.cpp b/src/amd/llvm/ac_llvm_helper.cpp index b9dd89f29f8..98d9ac0f9c3 100644 --- a/src/amd/llvm/ac_llvm_helper.cpp +++ b/src/amd/llvm/ac_llvm_helper.cpp @@ -256,11 +256,6 @@ void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr) llvm::unwrap(passmgr)->add(llvm::createBarrierNoopPass()); } -void ac_enable_global_isel(LLVMTargetMachineRef tm) -{ - reinterpret_cast(tm)->setGlobalISel(true); -} - LLVMValueRef ac_build_atomic_rmw(struct ac_llvm_context *ctx, LLVMAtomicRMWBinOp op, LLVMValueRef ptr, LLVMValueRef val, const char *sync_scope) { diff --git a/src/amd/llvm/ac_llvm_util.c b/src/amd/llvm/ac_llvm_util.c index ca19a3d1d2c..9e1091dd9ba 100644 --- a/src/amd/llvm/ac_llvm_util.c +++ b/src/amd/llvm/ac_llvm_util.c @@ -59,14 +59,10 @@ static void ac_init_llvm_target(void) * * "mesa" is the prefix for error messages. * - * -global-isel-abort=2 is a no-op unless global isel has been enabled. - * This option tells the backend to fall-back to SelectionDAG and print - * a diagnostic message if global isel fails. */ const char *argv[] = { "mesa", "-simplifycfg-sink-common=false", - "-global-isel-abort=2", "-amdgpu-atomic-optimizations=true", #if LLVM_VERSION_MAJOR == 11 /* This fixes variable indexing on LLVM 11. It also breaks atomic.cmpswap on LLVM >= 12. */ @@ -207,8 +203,7 @@ static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, if (out_triple) *out_triple = triple; - if (tm_options & AC_TM_ENABLE_GLOBAL_ISEL) - ac_enable_global_isel(tm); + return tm; } diff --git a/src/amd/llvm/ac_llvm_util.h b/src/amd/llvm/ac_llvm_util.h index 3d069b138ae..8eba8455d6a 100644 --- a/src/amd/llvm/ac_llvm_util.h +++ b/src/amd/llvm/ac_llvm_util.h @@ -63,8 +63,7 @@ enum ac_target_machine_options { AC_TM_SUPPORTS_SPILL = 1 << 0, AC_TM_CHECK_IR = 1 << 1, - AC_TM_ENABLE_GLOBAL_ISEL = 1 << 2, - AC_TM_CREATE_LOW_OPT = 1 << 3, + AC_TM_CREATE_LOW_OPT = 1 << 2, }; enum ac_float_mode @@ -132,7 +131,6 @@ void ac_destroy_llvm_passes(struct ac_compiler_passes *p); bool ac_compile_module_to_elf(struct ac_compiler_passes *p, LLVMModuleRef module, char **pelf_buffer, size_t *pelf_size); void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr); -void ac_enable_global_isel(LLVMTargetMachineRef tm); static inline bool ac_has_vec3_support(enum chip_class chip, bool use_format) { diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 5f8e9fb61a6..3cfbfc042d2 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -63,7 +63,6 @@ static const struct debug_named_value radeonsi_debug_options[] = { {"preoptir", DBG(PREOPT_IR), "Print the LLVM IR before initial optimizations"}, /* Shader compiler options the shader cache should be aware of: */ - {"gisel", DBG(GISEL), "Enable LLVM global instruction selector."}, {"w32ge", DBG(W32_GE), "Use Wave32 for vertex, tessellation, and geometry shaders."}, {"w32ps", DBG(W32_PS), "Use Wave32 for pixel shaders."}, {"w32psdiscard", DBG(W32_PS_DISCARD), "Use Wave32 for pixel shaders even if they contain discard and LLVM is buggy."}, @@ -145,7 +144,6 @@ void si_init_compiler(struct si_screen *sscreen, struct ac_llvm_compiler *compil !sscreen->info.has_dedicated_vram && sscreen->info.chip_class <= GFX8; enum ac_target_machine_options tm_options = - (sscreen->debug_flags & DBG(GISEL) ? AC_TM_ENABLE_GLOBAL_ISEL : 0) | (sscreen->debug_flags & DBG(CHECK_IR) ? AC_TM_CHECK_IR : 0) | (create_low_opt_compiler ? AC_TM_CREATE_LOW_OPT : 0); diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index a35dc43b2a9..fd484e3944a 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -192,7 +192,6 @@ enum /* Shader compiler options the shader cache should be aware of: */ DBG_FS_CORRECT_DERIVS_AFTER_KILL, - DBG_GISEL, DBG_W32_GE, DBG_W32_PS, DBG_W32_PS_DISCARD, diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp index f8105e2d814..49f53885105 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp +++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp @@ -190,8 +190,6 @@ void si_get_ir_cache_key(struct si_shader_selector *sel, bool ngg, bool es, shader_variant_flags |= 1 << 7; if (sel->screen->options.clamp_div_by_zero) shader_variant_flags |= 1 << 8; - if (sel->screen->debug_flags & DBG(GISEL)) - shader_variant_flags |= 1 << 9; if ((sel->info.stage == MESA_SHADER_VERTEX || sel->info.stage == MESA_SHADER_TESS_EVAL || sel->info.stage == MESA_SHADER_GEOMETRY) &&