diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index e94303e261c..a725f1a187b 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -5674,17 +5674,13 @@ visit_load_input(isel_context* ctx, nir_intrinsic_instr* instr)
          }
 
          if (use_mubuf) {
-            Instruction* mubuf = bld.mubuf(opcode, Definition(fetch_dst), list, fetch_index,
-                                           soffset, fetch_offset, false, false, true)
-                                    .instr;
-            mubuf->mubuf().vtx_binding = attrib_binding + 1;
+            bld.mubuf(opcode, Definition(fetch_dst), list, fetch_index,
+                                           soffset, fetch_offset, false, false, true);
          } else {
             unsigned dfmt = fetch_fmt & 0xf;
             unsigned nfmt = fetch_fmt >> 4;
-            Instruction* mtbuf = bld.mtbuf(opcode, Definition(fetch_dst), list, fetch_index,
-                                           soffset, dfmt, nfmt, fetch_offset, false, true)
-                                    .instr;
-            mtbuf->mtbuf().vtx_binding = attrib_binding + 1;
+            bld.mtbuf(opcode, Definition(fetch_dst), list, fetch_index,
+                                           soffset, dfmt, nfmt, fetch_offset, false, true);
          }
 
          emit_split_vector(ctx, fetch_dst, fetch_dst.bytes() * 8 / bitsize);
diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index 9e0c22414bc..3655ffb0487 100644
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -1050,14 +1050,6 @@ wait_imm::empty() const
 bool
 should_form_clause(const Instruction* a, const Instruction* b)
 {
-   /* Vertex attribute loads from the same binding likely load from similar addresses */
-   unsigned a_vtx_binding =
-      a->isMUBUF() ? a->mubuf().vtx_binding : (a->isMTBUF() ? a->mtbuf().vtx_binding : 0);
-   unsigned b_vtx_binding =
-      b->isMUBUF() ? b->mubuf().vtx_binding : (b->isMTBUF() ? b->mtbuf().vtx_binding : 0);
-   if (a_vtx_binding && a_vtx_binding == b_vtx_binding)
-      return true;
-
    if (a->format != b->format)
       return false;
 
diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h
index e99922896c3..b7a8a8f3fce 100644
--- a/src/amd/compiler/aco_ir.h
+++ b/src/amd/compiler/aco_ir.h
@@ -1560,8 +1560,7 @@ struct MUBUF_instruction : public Instruction {
    uint16_t offset : 12;     /* Unsigned byte offset - 12 bit */
    uint16_t swizzled : 1;
    uint16_t padding0 : 2;
-   uint16_t vtx_binding : 6; /* 0 if this is not a vertex attribute load */
-   uint16_t padding1 : 10;
+   uint16_t padding1;
 };
 static_assert(sizeof(MUBUF_instruction) == sizeof(Instruction) + 8, "Unexpected padding");
 
@@ -1584,8 +1583,7 @@ struct MTBUF_instruction : public Instruction {
    uint16_t slc : 1;         /* system level coherent */
    uint16_t tfe : 1;         /* texture fail enable */
    uint16_t disable_wqm : 1; /* Require an exec mask without helper invocations */
-   uint16_t vtx_binding : 6; /* 0 if this is not a vertex attribute load */
-   uint16_t padding : 4;
+   uint16_t padding : 10;
    uint16_t offset; /* Unsigned byte offset - 12 bit */
 };
 static_assert(sizeof(MTBUF_instruction) == sizeof(Instruction) + 8, "Unexpected padding");
diff --git a/src/amd/compiler/tests/test_hard_clause.cpp b/src/amd/compiler/tests/test_hard_clause.cpp
index 2a2f1e56956..a9eb4ee76fa 100644
--- a/src/amd/compiler/tests/test_hard_clause.cpp
+++ b/src/amd/compiler/tests/test_hard_clause.cpp
@@ -26,13 +26,12 @@
 
 using namespace aco;
 
-static void create_mubuf(Temp desc=Temp(0, s8), unsigned vtx_binding=0)
+static void create_mubuf(Temp desc=Temp(0, s8))
 {
    Operand desc_op(desc);
    desc_op.setFixed(PhysReg(0));
    bld.mubuf(aco_opcode::buffer_load_dword, Definition(PhysReg(256), v1), desc_op,
-             Operand(PhysReg(256), v1), Operand::zero(), 0, false)
-      ->mubuf().vtx_binding = vtx_binding;
+             Operand(PhysReg(256), v1), Operand::zero(), 0, false);
 }
 
 static void create_mubuf_store()
@@ -41,14 +40,13 @@ static void create_mubuf_store()
              Operand(PhysReg(256), v1), Operand::zero(), 0, false);
 }
 
-static void create_mtbuf(Temp desc=Temp(0, s8), unsigned vtx_binding=0)
+static void create_mtbuf(Temp desc=Temp(0, s8))
 {
    Operand desc_op(desc);
    desc_op.setFixed(PhysReg(0));
    bld.mtbuf(aco_opcode::tbuffer_load_format_x, Definition(PhysReg(256), v1), desc_op,
              Operand(PhysReg(256), v1), Operand::zero(), V_008F0C_BUF_DATA_FORMAT_32,
-             V_008F0C_BUF_NUM_FORMAT_FLOAT, 0, false)
-      ->mtbuf().vtx_binding = vtx_binding;
+             V_008F0C_BUF_NUM_FORMAT_FLOAT, 0, false);
 }
 
 static void create_flat()
@@ -305,22 +303,6 @@ BEGIN_TEST(form_hard_clauses.heuristic)
    create_mubuf(buf_desc0);
    create_mtbuf(buf_desc0);
 
-   //>> p_unit_test 8
-   //! s_clause imm:1
-   //; search_re('buffer_load_dword')
-   //; search_re('tbuffer_load_format_x')
-   bld.pseudo(aco_opcode::p_unit_test, Operand::c32(8u));
-   create_mubuf(buf_desc0, 1);
-   create_mtbuf(buf_desc0, 1);
-
-   //>> p_unit_test 9
-   //! s_clause imm:1
-   //; search_re('buffer_load_dword')
-   //; search_re('tbuffer_load_format_x')
-   bld.pseudo(aco_opcode::p_unit_test, Operand::c32(9u));
-   create_mubuf(buf_desc0, 1);
-   create_mtbuf(buf_desc1, 1);
-
    finish_form_hard_clause_test();
 END_TEST