From 7d4cc041563a93ce80ce38afcc9ebdb7d103a0ca Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Thu, 24 Oct 2024 14:15:58 +0100 Subject: [PATCH] radv,ac/nir: split global access using nir_lower_mem_access_bit_sizes Signed-off-by: Rhys Perry Reviewed-by: Georg Lehmann Part-of: --- src/amd/common/ac_nir.c | 9 +++++++-- src/amd/vulkan/radv_pipeline.c | 3 --- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_nir.c b/src/amd/common/ac_nir.c index 23c29c9889d..e381c6319ad 100644 --- a/src/amd/common/ac_nir.c +++ b/src/amd/common/ac_nir.c @@ -1758,8 +1758,13 @@ lower_mem_access_cb(nir_intrinsic_op intrin, uint8_t bytes, uint8_t bit_size, ui if (is_load && bit_size == 8 && combined_align >= 2 && bytes % 2 == 0) bit_size = 16; + unsigned max_components = 4; + if (cb_data->use_llvm && access & (ACCESS_COHERENT | ACCESS_VOLATILE) && + (intrin == nir_intrinsic_load_global || intrin == nir_intrinsic_store_global)) + max_components = 1; + nir_mem_access_size_align res; - res.num_components = MIN2(bytes / (bit_size / 8), 4); + res.num_components = MIN2(bytes / (bit_size / 8), max_components); res.bit_size = bit_size; res.align = MIN2(bit_size / 8, 4); /* 64-bit access only requires 4 byte alignment. */ res.shift = nir_mem_access_shift_method_shift64; @@ -1791,7 +1796,7 @@ lower_mem_access_cb(nir_intrinsic_op intrin, uint8_t bytes, uint8_t bit_size, ui } else { res.num_components = DIV_ROUND_UP(bytes + max_pad, 4); } - res.num_components = MIN2(res.num_components, 4); + res.num_components = MIN2(res.num_components, max_components); res.bit_size = 32; res.align = 4; res.shift = is_smem ? res.shift : nir_mem_access_shift_method_bytealign_amd; diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index f493dc7c403..4b18c5581b6 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -563,9 +563,6 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat .allow_fp16 = gfx_level >= GFX9, }); - if (radv_use_llvm_for_stage(pdev, stage->stage)) - NIR_PASS_V(stage->nir, nir_lower_io_to_scalar, nir_var_mem_global, NULL, NULL); - NIR_PASS(_, stage->nir, ac_nir_lower_global_access); NIR_PASS_V(stage->nir, ac_nir_lower_intrinsics_to_args, gfx_level, radv_select_hw_stage(&stage->info, gfx_level), &stage->args.ac);