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nir,radeonsi: add FLAGS into load_vector_arg_amd to record color input usage
This will be needed for gathering color usage from lowered PS. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26307>
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4 changed files with 27 additions and 5 deletions
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@ -1589,8 +1589,12 @@ intrinsic("store_hit_attrib_amd", src_comp=[1], indices=[BASE])
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# Load forced VRS rates.
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intrinsic("load_force_vrs_rates_amd", dest_comp=1, bit_sizes=[32], flags=[CAN_ELIMINATE, CAN_REORDER])
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intrinsic("load_scalar_arg_amd", dest_comp=0, bit_sizes=[32], indices=[BASE, ARG_UPPER_BOUND_U32_AMD], flags=[CAN_ELIMINATE, CAN_REORDER])
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intrinsic("load_vector_arg_amd", dest_comp=0, bit_sizes=[32], indices=[BASE, ARG_UPPER_BOUND_U32_AMD], flags=[CAN_ELIMINATE, CAN_REORDER])
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intrinsic("load_scalar_arg_amd", dest_comp=0, bit_sizes=[32],
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indices=[BASE, ARG_UPPER_BOUND_U32_AMD],
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flags=[CAN_ELIMINATE, CAN_REORDER])
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intrinsic("load_vector_arg_amd", dest_comp=0, bit_sizes=[32],
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indices=[BASE, ARG_UPPER_BOUND_U32_AMD, FLAGS],
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flags=[CAN_ELIMINATE, CAN_REORDER])
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store("scalar_arg_amd", [], [BASE])
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store("vector_arg_amd", [], [BASE])
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@ -616,9 +616,15 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s
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nir_def *color[4];
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for (int i = 0; i < 4; i++) {
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color[i] = colors_read & BITFIELD_BIT(start + i) ?
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ac_nir_load_arg_at_offset(b, &args->ac, args->color_start, offset++) :
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nir_undef(b, 1, 32);
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if (colors_read & BITFIELD_BIT(start + i)) {
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color[i] = ac_nir_load_arg_at_offset(b, &args->ac, args->color_start, offset++);
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nir_intrinsic_set_flags(nir_instr_as_intrinsic(color[i]->parent_instr),
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SI_VECTOR_ARG_IS_COLOR |
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SI_VECTOR_ARG_COLOR_COMPONENT(start + i));
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} else {
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color[i] = nir_undef(b, 1, 32);
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}
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}
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replacement = nir_vec(b, color, 4);
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@ -137,6 +137,10 @@ struct nir_lower_subgroups_options;
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/* D3D9 behaviour for COLOR0 requires 0001. GL is undefined. */
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#define SI_PS_INPUT_CNTL_UNUSED_COLOR0 SI_PS_INPUT_CNTL_0001
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#define SI_VECTOR_ARG_IS_COLOR BITFIELD_BIT(0)
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#define SI_VECTOR_ARG_COLOR_COMPONENT(x) (((x) & 0x7) << 1)
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#define SI_GET_VECTOR_ARG_COLOR_COMPONENT(x) (((x) >> 1) & 0x7)
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/* SGPR user data indices */
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enum
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{
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@ -526,6 +526,14 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
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}
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break;
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}
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case nir_intrinsic_load_vector_arg_amd:
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/* Non-monolithic lowered PS can have this. We need to record color usage. */
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if (nir_intrinsic_flags(intr) & SI_VECTOR_ARG_IS_COLOR) {
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/* The channel can be between 0 and 7. */
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unsigned chan = SI_GET_VECTOR_ARG_COLOR_COMPONENT(nir_intrinsic_flags(intr));
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info->colors_read |= BITFIELD_BIT(chan);
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}
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break;
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case nir_intrinsic_load_barycentric_at_offset: /* uses center */
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case nir_intrinsic_load_barycentric_at_sample: /* uses center */
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if (nir_intrinsic_interp_mode(intr) == INTERP_MODE_FLAT)
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