From 7d2a88a9e59ec04ed9a1a1402114e8c68adc2291 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 20 Apr 2026 11:49:53 -0400 Subject: [PATCH] jay/ra: don't reserve registers when not spilling No changes at SIMD16. At SIMD32: Totals: Instrs: 4691895 -> 4691989 (+0.00%); split: -0.03%, +0.03% CodeSize: 76010880 -> 76011248 (+0.00%); split: -0.03%, +0.03% Number of spill instructions: 54369 -> 54223 (-0.27%) Number of fill instructions: 56668 -> 56519 (-0.26%) Totals from 71 (2.68% of 2647) affected shaders: Instrs: 75963 -> 76057 (+0.12%); split: -1.67%, +1.79% CodeSize: 1229792 -> 1230160 (+0.03%); split: -1.71%, +1.74% Number of spill instructions: 146 -> 0 (-inf%) Number of fill instructions: 149 -> 0 (-inf%) Signed-off-by: Alyssa Rosenzweig Part-of: --- src/intel/compiler/jay/jay_register_allocate.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/src/intel/compiler/jay/jay_register_allocate.c b/src/intel/compiler/jay/jay_register_allocate.c index a444598181b..377c2d6b054 100644 --- a/src/intel/compiler/jay/jay_register_allocate.c +++ b/src/intel/compiler/jay/jay_register_allocate.c @@ -1548,15 +1548,11 @@ spill_file(jay_function *f, enum jay_file file, bool *spilled) limit = 13; } - /* Ensures we don't XOR swap, XXX: TODO: FIXME */ - limit--; - if (f->demand[file] > limit) { - /* In the worst case, we - * require 2 temporary registers to lower a memory-memory swap produced by - * parallel copy lowering, so adjust the limit to be num_regs - 2. + /* In the worst case when spilling, we require 2 temporary registers to + * lower a memory-memory swap produced by parallel copy lowering. */ - limit--; + limit -= 2; /* If we spill, we need to reserve UGPRs for spilling */ if (!(*spilled)) {