fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-24 15:20:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

ac/surface: relax custom pitch requirements to any multiple of 256B on gfx10.3+

Browse source 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
This commit is contained in:
Marek Olšák 2023-05-15 01:29:44 -04:00 • committed by Marge Bot
parent 3f7ddaf281
commit 7d066330e0
4 changed files with 14 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
src/amd/common/ac_surface.c
View file

@ -2995,20 +2995,21 @@ static uint32_t ac_surface_get_pitch_align(const struct radeon_info *info,
}
bool ac_surface_override_offset_stride(const struct radeon_info *info, struct radeon_surf *surf,
unsigned num_mipmap_levels, uint64_t offset, unsigned pitch)
unsigned num_layers, unsigned num_mipmap_levels,
uint64_t offset, unsigned pitch)
{
if ((ac_surface_get_pitch_align(info, surf) - 1) & pitch)
return false;
/*
* GFX10 and newer don't support custom strides. Furthermore, for
* multiple miplevels or compression data we'd really need to rerun
* addrlib to update all the fields in the surface. That, however, is a
* software limitation and could be relaxed later.
/* Require an equal pitch with metadata (DCC), mipmapping, non-linear layout (that could be
* relaxed), or when the chip is GFX10, which is the only generation that can't override
* the pitch.
*/
bool require_equal_pitch = surf->surf_size != surf->total_size ||
num_layers != 1 ||
num_mipmap_levels != 1 ||
info->gfx_level >= GFX10;
!surf->is_linear ||
info->gfx_level == GFX10;
if (info->gfx_level >= GFX9) {
if (pitch) {

3
src/amd/common/ac_surface.h
View file

@ -438,7 +438,8 @@ void ac_surface_compute_umd_metadata(const struct radeon_info *info, struct rade
bool include_tool_md);
bool ac_surface_override_offset_stride(const struct radeon_info *info, struct radeon_surf *surf,
unsigned num_mipmap_levels, uint64_t offset, unsigned pitch);
unsigned num_layers, unsigned num_mipmap_levels,
uint64_t offset, unsigned pitch);
struct ac_modifier_options {
bool dcc; /* Whether to allow DCC. */

5
src/amd/vulkan/radv_image.c
View file

@ -1515,7 +1515,7 @@ radv_image_override_offset_stride(struct radv_device *device, struct radv_image
uint64_t offset, uint32_t stride)
{
ac_surface_override_offset_stride(&device->physical_device->rad_info, &image->planes[0].surface,
image->vk.mip_levels, offset, stride);
image->vk.array_layers, image->vk.mip_levels, offset, stride);
}
static void
@ -1845,7 +1845,8 @@ radv_image_create_layout(struct radv_device *device, struct radv_image_create_in
}
if (!ac_surface_override_offset_stride(&device->physical_device->rad_info,
&image->planes[plane].surface, image->vk.mip_levels,
&image->planes[plane].surface,
image->vk.array_layers, image->vk.mip_levels,
offset, stride))
return VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT;

1
src/gallium/drivers/radeonsi/si_texture.c
View file

@ -932,6 +932,7 @@ static struct si_texture *si_texture_create_object(struct pipe_screen *screen,
tex->surface = *surface;
if (!ac_surface_override_offset_stride(&sscreen->info, &tex->surface,
tex->buffer.b.b.array_size,
tex->buffer.b.b.last_level + 1,
offset, pitch_in_bytes / tex->surface.bpe))
goto error;