From 7ce63372bd8a4e334718d6cb9c7ba04bf6b306bc Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Wed, 17 Dec 2025 13:03:45 -0800 Subject: [PATCH] tu: Drop tu_cs_image_*_ref These were only used in one place. Drop them and convert to using the new register packers for improved cross-gen portability. Signed-off-by: Rob Clark Part-of: --- src/freedreno/vulkan/tu_cmd_buffer.cc | 68 +++++++++++++++++++-------- src/freedreno/vulkan/tu_image.cc | 24 ---------- 2 files changed, 48 insertions(+), 44 deletions(-) diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index 27cb6023c5c..08a40266ec0 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -671,17 +671,32 @@ tu6_emit_zs(struct tu_cmd_buffer *cmd, &cmd->state.pass->attachments[a]; enum a6xx_depth_format fmt = tu6_pipe2depth(attachment->format); - tu_cs_emit_pkt4(cs, REG_A6XX_RB_DEPTH_BUFFER_INFO, 6); - tu_cs_emit(cs, RB_DEPTH_BUFFER_INFO(CHIP, - .depth_format = fmt, - .tilemode = TILE6_3, - .losslesscompen = iview->view.ubwc_enabled, - ).value); - if (attachment->format == VK_FORMAT_D32_SFLOAT_S8_UINT) - tu_cs_image_depth_ref(cs, iview, 0); - else - tu_cs_image_ref(cs, &iview->view, 0); - tu_cs_emit(cs, tu_attachment_gmem_offset(cmd, attachment, 0)); + unsigned depth_pitch, depth_array_pitch; + uint64_t depth_base; + + if (attachment->format == VK_FORMAT_D32_SFLOAT_S8_UINT) { + depth_pitch = iview->depth_pitch; + depth_array_pitch = iview->depth_layer_size; + depth_base = iview->depth_base_addr; + } else { + depth_pitch = iview->view.pitch; + depth_array_pitch = iview->view.layer_size; + depth_base = tu_layer_address(&iview->view, 0); + } + + tu_cs_emit_regs(cs, + RB_DEPTH_BUFFER_INFO(CHIP, + .depth_format = fmt, + .tilemode = TILE6_3, + .losslesscompen = iview->view.ubwc_enabled, + ), + A6XX_RB_DEPTH_BUFFER_PITCH(depth_pitch), + A6XX_RB_DEPTH_BUFFER_ARRAY_PITCH(depth_array_pitch), + A6XX_RB_DEPTH_BUFFER_BASE(depth_base), + A6XX_RB_DEPTH_GMEM_BASE( + tu_attachment_gmem_offset(cmd, attachment, 0) + ), + ); tu_cs_emit_regs(cs, GRAS_SU_DEPTH_BUFFER_INFO(CHIP, .depth_format = fmt)); @@ -691,18 +706,31 @@ tu6_emit_zs(struct tu_cmd_buffer *cmd, if (attachment->format == VK_FORMAT_D32_SFLOAT_S8_UINT || attachment->format == VK_FORMAT_S8_UINT) { - tu_cs_emit_pkt4(cs, REG_A6XX_RB_STENCIL_BUFFER_INFO, 6); - tu_cs_emit(cs, RB_STENCIL_BUFFER_INFO(CHIP, - .separate_stencil = true, - .tilemode = TILE6_3, - ).value); + unsigned stencil_pitch, stencil_array_pitch, stencil_gmem_offset; + uint64_t stencil_base; + if (attachment->format == VK_FORMAT_D32_SFLOAT_S8_UINT) { - tu_cs_image_stencil_ref(cs, iview, 0); - tu_cs_emit(cs, tu_attachment_gmem_offset_stencil(cmd, attachment, 0)); + stencil_pitch = iview->stencil_pitch; + stencil_array_pitch = iview->stencil_layer_size; + stencil_base = iview->stencil_base_addr; + stencil_gmem_offset = tu_attachment_gmem_offset_stencil(cmd, attachment, 0); } else { - tu_cs_image_ref(cs, &iview->view, 0); - tu_cs_emit(cs, tu_attachment_gmem_offset(cmd, attachment, 0)); + stencil_pitch = iview->view.pitch; + stencil_array_pitch = iview->view.layer_size; + stencil_base = tu_layer_address(&iview->view, 0); + stencil_gmem_offset = tu_attachment_gmem_offset(cmd, attachment, 0); } + + tu_cs_emit_regs(cs, + RB_STENCIL_BUFFER_INFO(CHIP, + .separate_stencil = true, + .tilemode = TILE6_3, + ), + A6XX_RB_STENCIL_BUFFER_PITCH(stencil_pitch), + A6XX_RB_STENCIL_BUFFER_ARRAY_PITCH(stencil_array_pitch), + A6XX_RB_STENCIL_BUFFER_BASE(stencil_base), + A6XX_RB_STENCIL_GMEM_BASE(stencil_gmem_offset), + ); } else { tu_cs_emit_regs(cs, RB_STENCIL_BUFFER_INFO(CHIP, 0)); diff --git a/src/freedreno/vulkan/tu_image.cc b/src/freedreno/vulkan/tu_image.cc index ec18832bdce..d7dcf81367e 100644 --- a/src/freedreno/vulkan/tu_image.cc +++ b/src/freedreno/vulkan/tu_image.cc @@ -147,30 +147,6 @@ tu_layer_flag_address(const struct fdl6_view *iview, uint32_t layer) return iview->ubwc_addr + iview->ubwc_layer_size * layer; } -void -tu_cs_image_ref(struct tu_cs *cs, const struct fdl6_view *iview, uint32_t layer) -{ - tu_cs_emit(cs, A6XX_RB_MRT_PITCH(0, iview->pitch).value); - tu_cs_emit(cs, iview->layer_size >> 6); - tu_cs_emit_qw(cs, tu_layer_address(iview, layer)); -} - -void -tu_cs_image_stencil_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer) -{ - tu_cs_emit(cs, A6XX_RB_STENCIL_BUFFER_PITCH(iview->stencil_pitch).value); - tu_cs_emit(cs, iview->stencil_layer_size >> 6); - tu_cs_emit_qw(cs, iview->stencil_base_addr + iview->stencil_layer_size * layer); -} - -void -tu_cs_image_depth_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer) -{ - tu_cs_emit(cs, A6XX_RB_DEPTH_BUFFER_PITCH(iview->depth_pitch).value); - tu_cs_emit(cs, iview->depth_layer_size >> 6); - tu_cs_emit_qw(cs, iview->depth_base_addr + iview->depth_layer_size * layer); -} - template void tu_cs_image_ref_2d(struct tu_cs *cs, const struct fdl6_view *iview, uint32_t layer, bool src)