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radeonsi/gfx10: set the DCC constant encoding flag

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Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Marek Olšák 2019-05-23 14:20:27 -04:00
parent 6eb219e963
commit 7c805a7c67
1 changed files with 2 additions and 1 deletions
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3
src/gallium/drivers/radeonsi/si_pipe.c
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@ -1124,7 +1124,8 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
sscreen->info.family == CHIP_RAVEN;
sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 ||
sscreen->info.family == CHIP_RAVEN;
sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2;
sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2 ||
sscreen->info.chip_class >= GFX10;
/* Only enable primitive binning on APUs by default. */
sscreen->dpbb_allowed = sscreen->info.family == CHIP_RAVEN ||