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intel/brw: Allow immediates in the BFE instruction on Gfx12+
We weren't allowing immediates in BFE at all. Gfx12+ supports immediates in src0 (value) and src2 (width), but not src1 (offset). Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31437>
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1 changed files with 9 additions and 4 deletions
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@ -996,7 +996,7 @@ supports_src_as_imm(const struct intel_device_info *devinfo, const fs_inst *inst
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switch (inst->opcode) {
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switch (inst->opcode) {
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case BRW_OPCODE_ADD3:
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case BRW_OPCODE_ADD3:
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/* ADD3 only exists on Gfx12.5+. */
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case BRW_OPCODE_BFE:
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return true;
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return true;
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case BRW_OPCODE_CSEL:
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case BRW_OPCODE_CSEL:
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@ -1026,8 +1026,13 @@ can_promote_src_as_imm(const struct intel_device_info *devinfo, fs_inst *inst,
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* only propagates into src0. It's possible that src2 works for W or UW MAD
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* only propagates into src0. It's possible that src2 works for W or UW MAD
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* on Gfx12.5.
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* on Gfx12.5.
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*/
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*/
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if (inst->opcode == BRW_OPCODE_BFE) {
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if (src_idx == 1)
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return false;
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} else {
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if (src_idx != 0)
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if (src_idx != 0)
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return false;
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return false;
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}
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if (!supports_src_as_imm(devinfo, inst))
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if (!supports_src_as_imm(devinfo, inst))
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return false;
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return false;
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@ -1302,6 +1307,7 @@ brw_fs_opt_combine_constants(fs_visitor &s)
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* 16-bits, it would be better to add both sources with
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* 16-bits, it would be better to add both sources with
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* allow_one_constant=true as is done for SEL.
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* allow_one_constant=true as is done for SEL.
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*/
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*/
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case BRW_OPCODE_BFE:
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case BRW_OPCODE_ADD3:
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case BRW_OPCODE_ADD3:
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case BRW_OPCODE_CSEL:
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case BRW_OPCODE_CSEL:
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case BRW_OPCODE_MAD: {
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case BRW_OPCODE_MAD: {
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@ -1319,7 +1325,6 @@ brw_fs_opt_combine_constants(fs_visitor &s)
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break;
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break;
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}
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}
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case BRW_OPCODE_BFE:
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case BRW_OPCODE_BFI2:
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case BRW_OPCODE_BFI2:
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case BRW_OPCODE_LRP:
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case BRW_OPCODE_LRP:
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for (int i = 0; i < inst->sources; i++) {
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for (int i = 0; i < inst->sources; i++) {
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