From 7bd3a9f5029657ccc7dea87f0a52af562f46fda2 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 22 Mar 2021 18:15:26 +0100 Subject: [PATCH] radv: update the HTILE clear word when VRS is used SR1 is the VRS x-rate. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_meta_clear.c | 6 +++++- src/amd/vulkan/radv_private.h | 12 +++++++++++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index 3ac971238a6..cc16bee963f 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -873,7 +873,11 @@ radv_get_htile_fast_clear_value(const struct radv_device *device, const struct r if (radv_image_tile_stencil_disabled(device, image)) { clear_value = value.depth ? 0xfffffff0 : 0; } else { - clear_value = value.depth ? 0xfffc00f0 : 0xf0; + if (radv_image_has_vrs_htile(device, image)) + clear_value = value.depth ? 0xfffc0030 : 0x30; + else { + clear_value = value.depth ? 0xfffc00f0 : 0xf0; + } } return clear_value; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 5ef8f9ad921..266a8ced7af 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -2045,8 +2045,18 @@ radv_get_htile_initial_value(const struct radv_device *device, const struct radv * * SR0/SR1 contains the stencil test results. Initializing * SR0/SR1 to 0x3 means the stencil test result is unknown. + * + * Z, stencil and 4 bit VRS encoding: + * |31 12|11 10|9 8|7 6|5 4|3 0| + * +-----------+------------+------+------------+-----+-------+ + * | Z Range | VRS y-rate | SMem | VRS x-rate | SR0 | ZMask | */ - initial_value = 0xfffff3ff; + if (radv_image_has_vrs_htile(device, image)) { + /* Initialize the VRS x-rate value at 0, so the hw interprets it as 1 sample. */ + initial_value = 0xfffff33f; + } else { + initial_value = 0xfffff3ff; + } } return initial_value;