diff --git a/src/gallium/drivers/panfrost/pan_assemble.c b/src/gallium/drivers/panfrost/pan_assemble.c
index bc65919a82f..939e73d16fd 100644
--- a/src/gallium/drivers/panfrost/pan_assemble.c
+++ b/src/gallium/drivers/panfrost/pan_assemble.c
@@ -40,59 +40,53 @@
 #include "tgsi/tgsi_dump.h"
 
 static void
-pan_pack_midgard_props(struct panfrost_shader_state *state,
-                gl_shader_stage stage)
+pan_prepare_midgard_props(struct panfrost_shader_state *state,
+                          gl_shader_stage stage)
 {
-        pan_pack(&state->properties, MIDGARD_PROPERTIES, cfg) {
-                cfg.uniform_buffer_count = state->ubo_count;
-                cfg.uniform_count = state->uniform_count;
-                cfg.writes_globals = state->writes_global;
-                cfg.suppress_inf_nan = true; /* XXX */
+        pan_prepare(&state->properties, RENDERER_PROPERTIES);
+        state->properties.uniform_buffer_count = state->ubo_count;
+        state->properties.uniform_count = state->uniform_count;
+        state->properties.writes_globals = state->writes_global;
+        state->properties.suppress_inf_nan = true; /* XXX */
 
-                if (stage == MESA_SHADER_FRAGMENT) {
-                        /* Work register count, early-z, reads at draw-time */
-                        cfg.stencil_from_shader = state->writes_stencil;
-                        cfg.helper_invocation_enable = state->helper_invocations;
-                        cfg.depth_source = state->writes_depth ?
-                                MALI_DEPTH_SOURCE_SHADER :
-                                MALI_DEPTH_SOURCE_FIXED_FUNCTION;
-                } else {
-                        cfg.work_register_count = state->work_reg_count;
-                }
+        if (stage == MESA_SHADER_FRAGMENT) {
+                /* Work register count, early-z, reads at draw-time */
+                state->properties.stencil_from_shader = state->writes_stencil;
+                state->properties.helper_invocation_enable = state->helper_invocations;
+                state->properties.depth_source = state->writes_depth ?
+                                                 MALI_DEPTH_SOURCE_SHADER :
+                                                 MALI_DEPTH_SOURCE_FIXED_FUNCTION;
+        } else {
+                state->properties.work_register_count = state->work_reg_count;
         }
 }
 
 static void
-pan_pack_bifrost_props(struct panfrost_shader_state *state,
-                gl_shader_stage stage)
+pan_prepare_bifrost_props(struct panfrost_shader_state *state,
+                          gl_shader_stage stage)
 {
+
         switch (stage) {
         case MESA_SHADER_VERTEX:
-                pan_pack(&state->properties, BIFROST_PROPERTIES, cfg) {
-                        cfg.unknown = 0x800000; /* XXX */
-                        cfg.uniform_buffer_count = state->ubo_count;
-                }
-
-                pan_pack(&state->preload, PRELOAD_VERTEX, cfg) {
-                        cfg.uniform_count = state->uniform_count;
-                        cfg.vertex_id = true;
-                        cfg.instance_id = true;
-                }
+                pan_prepare(&state->properties, RENDERER_PROPERTIES);
+                state->properties.unknown = 0x800000; /* XXX */
+                state->properties.uniform_buffer_count = state->ubo_count;
 
+                pan_prepare(&state->preload, PRELOAD);
+                state->preload.uniform_count = state->uniform_count;
+                state->preload.vertex_id = true;
+                state->preload.instance_id = true;
                 break;
         case MESA_SHADER_FRAGMENT:
-                pan_pack(&state->properties, BIFROST_PROPERTIES, cfg) {
-                        /* Early-Z set at draw-time */
-
-                        cfg.unknown = 0x950020; /* XXX */
-                        cfg.uniform_buffer_count = state->ubo_count;
-                }
-
-                pan_pack(&state->preload, PRELOAD_FRAGMENT, cfg) {
-                        cfg.uniform_count = state->uniform_count;
-                        cfg.fragment_position = state->reads_frag_coord;
-                }
+                pan_prepare(&state->properties, RENDERER_PROPERTIES);
+                /* Early-Z set at draw-time */
+                state->properties.unknown = 0x950020; /* XXX */
+                state->properties.uniform_buffer_count = state->ubo_count;
 
+                pan_prepare(&state->preload, PRELOAD);
+                state->preload.uniform_count = state->uniform_count;
+                state->preload.fragment_position = state->reads_frag_coord;
+                state->preload.unknown = true;
                 break;
         default:
                 unreachable("TODO");
@@ -109,9 +103,9 @@ pan_upload_shader_descriptor(struct panfrost_context *ctx,
         u_upload_alloc(ctx->state_uploader, 0, MALI_RENDERER_STATE_LENGTH, MALI_RENDERER_STATE_LENGTH,
                         &state->upload.offset, &state->upload.rsrc, (void **) &out);
 
-        pan_pack(out, RENDERER_STATE_OPAQUE, cfg) {
+        pan_pack(out, RENDERER_STATE, cfg) {
                 cfg.shader = state->shader;
-                memcpy(&cfg.properties, &state->properties, sizeof(state->properties));
+                cfg.properties = state->properties;
 
                 if (dev->quirks & IS_BIFROST)
                         cfg.preload = state->preload;
@@ -370,18 +364,16 @@ panfrost_shader_compile(struct panfrost_context *ctx,
         state->ubo_count = s->info.num_ubos + 1; /* off-by-one for uniforms */
 
         /* Prepare the descriptors at compile-time */
-        pan_pack(&state->shader, SHADER, cfg) {
-                cfg.shader = shader;
-                cfg.attribute_count = attribute_count;
-                cfg.varying_count = varying_count;
-                cfg.texture_count = s->info.num_textures;
-                cfg.sampler_count = cfg.texture_count;
-        }
+        state->shader.shader = shader;
+        state->shader.attribute_count = attribute_count;
+        state->shader.varying_count = varying_count;
+        state->shader.texture_count = s->info.num_textures;
+        state->shader.sampler_count = s->info.num_textures;
 
         if (dev->quirks & IS_BIFROST)
-                pan_pack_bifrost_props(state, stage);
+                pan_prepare_bifrost_props(state, stage);
         else
-                pan_pack_midgard_props(state, stage);
+                pan_prepare_midgard_props(state, stage);
 
         if (stage != MESA_SHADER_FRAGMENT)
                 pan_upload_shader_descriptor(ctx, state);
diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.c b/src/gallium/drivers/panfrost/pan_cmdstream.c
index 96cd269452e..811e4ac0cde 100644
--- a/src/gallium/drivers/panfrost/pan_cmdstream.c
+++ b/src/gallium/drivers/panfrost/pan_cmdstream.c
@@ -355,62 +355,49 @@ panfrost_emit_blend(struct panfrost_batch *batch, void *rts,
 }
 
 static void
-panfrost_emit_frag_shader(struct panfrost_context *ctx,
-                          struct mali_renderer_state_packed *fragmeta,
-                          struct panfrost_blend_final *blend)
+panfrost_prepare_bifrost_fs_state(struct panfrost_context *ctx,
+                                  struct panfrost_blend_final *blend,
+                                  struct MALI_RENDERER_STATE *state)
 {
-        const struct panfrost_device *dev = pan_device(ctx->base.screen);
         struct panfrost_shader_state *fs = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
-        struct pipe_rasterizer_state *rast = &ctx->rasterizer->base;
-        const struct panfrost_zsa_state *zsa = ctx->depth_stencil;
         unsigned rt_count = ctx->pipe_framebuffer.nr_cbufs;
-        bool alpha_to_coverage = ctx->blend->base.alpha_to_coverage;
-
-        /* Built up here */
-        struct mali_shader_packed shader = fs->shader;
-        struct mali_preload_packed preload = fs->preload;
-        uint32_t properties;
-        struct mali_multisample_misc_packed multisample_misc;
-        struct mali_stencil_mask_misc_packed stencil_mask_misc;
-        union midgard_blend sfbd_blend = { 0 };
 
         if (!panfrost_fs_required(fs, blend, rt_count)) {
-                if (dev->quirks & IS_BIFROST) {
-                        pan_pack(&shader, SHADER, cfg) {}
-
-                        pan_pack(&properties, BIFROST_PROPERTIES, cfg) {
-                                cfg.unknown = 0x950020; /* XXX */
-                                cfg.early_z_enable = true;
-                        }
-
-                        preload.opaque[0] = 0;
-                } else {
-                        pan_pack(&shader, SHADER, cfg) {
-                                cfg.shader = 0x1;
-                        }
-
-                        pan_pack(&properties, MIDGARD_PROPERTIES, cfg) {
-                                cfg.work_register_count = 1;
-                                cfg.depth_source = MALI_DEPTH_SOURCE_FIXED_FUNCTION;
-                                cfg.early_z_enable = true;
-                        }
-                }
-        } else if (dev->quirks & IS_BIFROST) {
+                state->properties.unknown = 0x950020; /* XXX */
+                state->properties.bifrost_early_z_enable = true;
+        } else {
                 bool no_blend = true;
 
                 for (unsigned i = 0; i < rt_count; ++i)
                         no_blend &= (!blend[i].load_dest | blend[i].no_colour);
 
-                pan_pack(&properties, BIFROST_PROPERTIES, cfg) {
-                        cfg.early_z_enable = !fs->can_discard && !fs->writes_depth && no_blend;
-                }
+                state->properties = fs->properties;
+                state->properties.bifrost_early_z_enable = !fs->can_discard && !fs->writes_depth && no_blend;
+                state->shader = fs->shader;
+                state->preload = fs->preload;
+        }
+}
 
-                /* Combine with prepacked properties */
-                properties |= fs->properties.opaque[0];
+static void
+panfrost_prepare_midgard_fs_state(struct panfrost_context *ctx,
+                                  struct panfrost_blend_final *blend,
+                                  struct MALI_RENDERER_STATE *state)
+{
+        const struct panfrost_device *dev = pan_device(ctx->base.screen);
+        struct panfrost_shader_state *fs = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
+        const struct panfrost_zsa_state *zsa = ctx->depth_stencil;
+        unsigned rt_count = ctx->pipe_framebuffer.nr_cbufs;
+        bool alpha_to_coverage = ctx->blend->base.alpha_to_coverage;
+
+        if (!panfrost_fs_required(fs, blend, rt_count)) {
+                state->shader.shader = 0x1;
+                state->properties.work_register_count = 1;
+                state->properties.depth_source = MALI_DEPTH_SOURCE_FIXED_FUNCTION;
+                state->properties.midgard_early_z_enable = true;
         } else {
                 /* Reasons to disable early-Z from a shader perspective */
                 bool late_z = fs->can_discard || fs->writes_global ||
-                        fs->writes_depth || fs->writes_stencil;
+                              fs->writes_depth || fs->writes_stencil;
 
                 /* If either depth or stencil is enabled, discard matters */
                 bool zs_enabled =
@@ -422,71 +409,34 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
                 for (unsigned c = 0; c < rt_count; ++c)
                         has_blend_shader |= blend[c].is_shader;
 
-                pan_pack(&properties, MIDGARD_PROPERTIES, cfg) {
-                        /* TODO: Reduce this limit? */
-                        if (has_blend_shader)
-                                cfg.work_register_count = MAX2(fs->work_reg_count, 8);
-                        else
-                                cfg.work_register_count = fs->work_reg_count;
+                /* TODO: Reduce this limit? */
+                state->properties = fs->properties;
+                if (has_blend_shader)
+                        state->properties.work_register_count = MAX2(fs->work_reg_count, 8);
+                else
+                        state->properties.work_register_count = fs->work_reg_count;
 
-                        cfg.early_z_enable = !(late_z || alpha_to_coverage);
-                        cfg.reads_tilebuffer = fs->outputs_read || (!zs_enabled && fs->can_discard);
-                        cfg.reads_depth_stencil = zs_enabled && fs->can_discard;
-                }
-
-                properties |= fs->properties.opaque[0];
-        }
-
-        pan_pack(&multisample_misc, MULTISAMPLE_MISC, cfg) {
-                bool msaa = rast->multisample;
-                cfg.multisample_enable = msaa;
-                cfg.sample_mask = (msaa ? ctx->sample_mask : ~0) & 0xFFFF;
-
-                /* EXT_shader_framebuffer_fetch requires per-sample */
-                bool per_sample = ctx->min_samples > 1 || fs->outputs_read;
-                cfg.evaluate_per_sample = msaa && per_sample;
-
-                if (dev->quirks & MIDGARD_SFBD) {
-                        cfg.sfbd_load_destination = blend[0].load_dest;
-                        cfg.sfbd_blend_shader = blend[0].is_shader;
-                }
-
-                cfg.depth_function = zsa->base.depth.enabled ?
-                        panfrost_translate_compare_func(zsa->base.depth.func) :
-                        MALI_FUNC_ALWAYS;
-
-                cfg.depth_write_mask = zsa->base.depth.writemask;
-                cfg.fixed_function_near_discard = rast->depth_clip_near;
-                cfg.fixed_function_far_discard = rast->depth_clip_far;
-                cfg.unknown_2 = true;
-        }
-
-        pan_pack(&stencil_mask_misc, STENCIL_MASK_MISC, cfg) {
-                cfg.stencil_mask_front = zsa->stencil_mask_front;
-                cfg.stencil_mask_back = zsa->stencil_mask_back;
-                cfg.stencil_enable = zsa->base.stencil[0].enabled;
-                cfg.alpha_to_coverage = alpha_to_coverage;
-
-                if (dev->quirks & MIDGARD_SFBD) {
-                        cfg.sfbd_write_enable = !blend[0].no_colour;
-                        cfg.sfbd_srgb = util_format_is_srgb(ctx->pipe_framebuffer.cbufs[0]->format);
-                        cfg.sfbd_dither_disable = !ctx->blend->base.dither;
-                }
-
-                cfg.unknown_1 = 0x7;
-                cfg.depth_range_1 = cfg.depth_range_2 = rast->offset_tri;
-                cfg.single_sampled_lines = !rast->multisample;
+                state->properties.midgard_early_z_enable = !(late_z || alpha_to_coverage);
+                state->properties.reads_tilebuffer = fs->outputs_read || (!zs_enabled && fs->can_discard);
+                state->properties.reads_depth_stencil = zs_enabled && fs->can_discard;
+                state->shader = fs->shader;
         }
 
         if (dev->quirks & MIDGARD_SFBD) {
+                state->multisample_misc.sfbd_load_destination = blend[0].load_dest;
+                state->multisample_misc.sfbd_blend_shader = blend[0].is_shader;
+                state->stencil_mask_misc.sfbd_write_enable = !blend[0].no_colour;
+                state->stencil_mask_misc.sfbd_srgb = util_format_is_srgb(ctx->pipe_framebuffer.cbufs[0]->format);
+                state->stencil_mask_misc.sfbd_dither_disable = !ctx->blend->base.dither;
+
                 if (blend[0].is_shader) {
-                        sfbd_blend.shader = blend[0].shader.gpu |
-                                blend[0].shader.first_tag;
+                        state->sfbd_blend_shader = blend[0].shader.gpu |
+                                                   blend[0].shader.first_tag;
                 } else {
-                        sfbd_blend.equation = blend[0].equation.equation;
-                        sfbd_blend.constant = blend[0].equation.constant;
+                        state->sfbd_blend_equation = blend[0].equation.equation.opaque[0];
+                        state->sfbd_blend_constant = blend[0].equation.constant;
                 }
-        } else if (!(dev->quirks & IS_BIFROST)) {
+        } else {
                 /* Bug where MRT-capable hw apparently reads the last blend
                  * shader from here instead of the usual location? */
 
@@ -494,32 +444,71 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
                         if (!blend[rt].is_shader)
                                 continue;
 
-                        sfbd_blend.shader = blend[rt].shader.gpu |
-                                                 blend[rt].shader.first_tag;
+                        state->sfbd_blend_shader = blend[rt].shader.gpu |
+                                                   blend[rt].shader.first_tag;
                         break;
                 }
         }
+}
 
-        pan_pack(fragmeta, RENDERER_STATE_OPAQUE, cfg) {
-                cfg.shader = fs->shader;
-                cfg.properties = properties;
-                cfg.depth_units = rast->offset_units * 2.0f;
-                cfg.depth_factor = rast->offset_scale;
-                cfg.multisample_misc = multisample_misc;
-                cfg.stencil_mask_misc = stencil_mask_misc;
+static void
+panfrost_prepare_fs_state(struct panfrost_context *ctx,
+                          struct panfrost_blend_final *blend,
+                          struct MALI_RENDERER_STATE *state)
+{
+        const struct panfrost_device *dev = pan_device(ctx->base.screen);
+        struct panfrost_shader_state *fs = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
+        struct pipe_rasterizer_state *rast = &ctx->rasterizer->base;
+        const struct panfrost_zsa_state *zsa = ctx->depth_stencil;
+        bool alpha_to_coverage = ctx->blend->base.alpha_to_coverage;
 
-                cfg.stencil_front = zsa->stencil_front;
-                cfg.stencil_back = zsa->stencil_back;
+        if (dev->quirks & IS_BIFROST)
+                panfrost_prepare_bifrost_fs_state(ctx, blend, state);
+        else
+                panfrost_prepare_midgard_fs_state(ctx, blend, state);
 
-                /* Bottom bits for stencil ref, exactly one word */
-                bool back_enab = zsa->base.stencil[1].enabled;
-                cfg.stencil_front.opaque[0] |= ctx->stencil_ref.ref_value[0];
-                cfg.stencil_back.opaque[0] |= ctx->stencil_ref.ref_value[back_enab ? 1 : 0];
+        bool msaa = rast->multisample;
+        state->multisample_misc.multisample_enable = msaa;
+        state->multisample_misc.sample_mask = (msaa ? ctx->sample_mask : ~0) & 0xFFFF;
 
-                if (dev->quirks & IS_BIFROST)
-                        cfg.preload = preload;
-                else
-                        memcpy(&cfg.sfbd_blend, &sfbd_blend, sizeof(sfbd_blend));
+        /* EXT_shader_framebuffer_fetch requires per-sample */
+        bool per_sample = ctx->min_samples > 1 || fs->outputs_read;
+        state->multisample_misc.evaluate_per_sample = msaa && per_sample;
+        state->multisample_misc.depth_function = zsa->base.depth.enabled ?
+                panfrost_translate_compare_func(zsa->base.depth.func) :
+                MALI_FUNC_ALWAYS;
+
+        state->multisample_misc.depth_write_mask = zsa->base.depth.writemask;
+        state->multisample_misc.fixed_function_near_discard = rast->depth_clip_near;
+        state->multisample_misc.fixed_function_far_discard = rast->depth_clip_far;
+        state->multisample_misc.unknown_2 = true;
+
+        state->stencil_mask_misc.stencil_mask_front = zsa->stencil_mask_front;
+        state->stencil_mask_misc.stencil_mask_back = zsa->stencil_mask_back;
+        state->stencil_mask_misc.stencil_enable = zsa->base.stencil[0].enabled;
+        state->stencil_mask_misc.alpha_to_coverage = alpha_to_coverage;
+        state->stencil_mask_misc.unknown_1 = 0x7;
+        state->stencil_mask_misc.depth_range_1 = rast->offset_tri;
+        state->stencil_mask_misc.depth_range_2 = rast->offset_tri;
+        state->stencil_mask_misc.single_sampled_lines = !rast->multisample;
+        state->depth_units = rast->offset_units * 2.0f;
+        state->depth_factor = rast->offset_scale;
+
+        bool back_enab = zsa->base.stencil[1].enabled;
+        state->stencil_front = zsa->stencil_front;
+        state->stencil_back = zsa->stencil_back;
+        state->stencil_front.reference_value = ctx->stencil_ref.ref_value[0];
+        state->stencil_back.reference_value = ctx->stencil_ref.ref_value[back_enab ? 1 : 0];
+}
+
+
+static void
+panfrost_emit_frag_shader(struct panfrost_context *ctx,
+                          struct mali_renderer_state_packed *fragmeta,
+                          struct panfrost_blend_final *blend)
+{
+        pan_pack(fragmeta, RENDERER_STATE, cfg) {
+                panfrost_prepare_fs_state(ctx, blend, &cfg);
         }
 }
 
diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c
index 222a7640d64..8185640cd84 100644
--- a/src/gallium/drivers/panfrost/pan_context.c
+++ b/src/gallium/drivers/panfrost/pan_context.c
@@ -1181,15 +1181,14 @@ pan_pipe_to_stencil_op(enum pipe_stencil_op in)
 }
 
 static inline void
-pan_pipe_to_stencil(const struct pipe_stencil_state *in, void *out)
+pan_pipe_to_stencil(const struct pipe_stencil_state *in, struct MALI_STENCIL *out)
 {
-        pan_pack(out, STENCIL, cfg) {
-                cfg.mask = in->valuemask;
-                cfg.compare_function = panfrost_translate_compare_func(in->func);
-                cfg.stencil_fail = pan_pipe_to_stencil_op(in->fail_op);
-                cfg.depth_fail = pan_pipe_to_stencil_op(in->zfail_op);
-                cfg.depth_pass = pan_pipe_to_stencil_op(in->zpass_op);
-        }
+        pan_prepare(out, STENCIL);
+        out->mask = in->valuemask;
+        out->compare_function = panfrost_translate_compare_func(in->func);
+        out->stencil_fail = pan_pipe_to_stencil_op(in->fail_op);
+        out->depth_fail = pan_pipe_to_stencil_op(in->zfail_op);
+        out->depth_pass = pan_pipe_to_stencil_op(in->zpass_op);
 }
 
 static void *
@@ -1205,7 +1204,7 @@ panfrost_create_depth_stencil_state(struct pipe_context *pipe,
         if (zsa->stencil[1].enabled) {
                 pan_pipe_to_stencil(&zsa->stencil[1], &so->stencil_back);
                 so->stencil_mask_back = zsa->stencil[1].writemask;
-        } else {
+	} else {
                 so->stencil_back = so->stencil_front;
                 so->stencil_mask_back = so->stencil_mask_front;
         }
diff --git a/src/gallium/drivers/panfrost/pan_context.h b/src/gallium/drivers/panfrost/pan_context.h
index cdebf3b4521..c9f0c1bdb35 100644
--- a/src/gallium/drivers/panfrost/pan_context.h
+++ b/src/gallium/drivers/panfrost/pan_context.h
@@ -202,9 +202,9 @@ struct panfrost_shader_state {
                 uint32_t offset;
         } upload;
 
-        struct mali_shader_packed shader;
-        struct mali_midgard_properties_packed properties;
-        struct mali_preload_packed preload;
+        struct MALI_SHADER shader;
+        struct MALI_RENDERER_PROPERTIES properties;
+        struct MALI_PRELOAD preload;
 
         /* Non-descript information */
         unsigned uniform_count;
@@ -278,8 +278,8 @@ struct panfrost_zsa_state {
         struct pipe_depth_stencil_alpha_state base;
 
         /* Precomputed stencil state */
-        struct mali_stencil_packed stencil_front;
-        struct mali_stencil_packed stencil_back;
+        struct MALI_STENCIL stencil_front;
+        struct MALI_STENCIL stencil_back;
         u8 stencil_mask_front;
         u8 stencil_mask_back;
 };
diff --git a/src/panfrost/bifrost/test/bi_submit.c b/src/panfrost/bifrost/test/bi_submit.c
index b4f181ea9d9..955142f1ac3 100644
--- a/src/panfrost/bifrost/test/bi_submit.c
+++ b/src/panfrost/bifrost/test/bi_submit.c
@@ -176,13 +176,10 @@ bit_vertex(struct panfrost_device *dev, panfrost_program prog,
         pan_pack(shader_desc->cpu, RENDERER_STATE, cfg) {
                 cfg.shader.shader = shader->gpu;
                 cfg.shader.attribute_count = cfg.shader.varying_count = 1;
-                cfg.properties = 0x800001;
-
-                pan_pack(&cfg.preload.untyped, PRELOAD_VERTEX, n) {
-                        n.vertex_id = true;
-                        n.instance_id = true;
-                }
- 
+                cfg.properties.uniform_buffer_count = 1;
+                cfg.properties.uniform_count = 4;
+                cfg.preload.vertex_id = true;
+                cfg.preload.instance_id = true;
                 cfg.preload.uniform_count = (sz_ubo / 16);
         }
 
diff --git a/src/panfrost/lib/decode.c b/src/panfrost/lib/decode.c
index a0ed75580d0..f1f3db80c03 100644
--- a/src/panfrost/lib/decode.c
+++ b/src/panfrost/lib/decode.c
@@ -1168,51 +1168,30 @@ pandecode_vertex_tiler_postfix_pre(
                 varying_count = state.shader.varying_count;
                 texture_count = state.shader.texture_count;
                 sampler_count = state.shader.sampler_count;
+                uniform_buffer_count = state.properties.uniform_buffer_count;
 
-                fprintf(pandecode_dump_stream, "  Properties\n");
-                if (is_bifrost) {
-                        pan_unpack(&state.properties, BIFROST_PROPERTIES, bi_props);
-                        DUMP_UNPACKED(BIFROST_PROPERTIES, bi_props, "Properties:\n");
-
+                if (is_bifrost)
                         uniform_count = state.preload.uniform_count;
-                        uniform_buffer_count = bi_props.uniform_buffer_count;
-                } else {
-                        pan_unpack(&state.properties, MIDGARD_PROPERTIES, midg_props);
-                        DUMP_UNPACKED(MIDGARD_PROPERTIES, midg_props, "Properties:\n")
-
-                        uniform_count = midg_props.uniform_count;
-                        uniform_buffer_count = midg_props.uniform_buffer_count;
-                }
+                else
+                        uniform_count = state.properties.uniform_count;
 
                 pandecode_shader_prop("texture_count", texture_count, info.texture_count, false);
                 pandecode_shader_prop("sampler_count", sampler_count, info.sampler_count, false);
                 pandecode_shader_prop("attribute_count", attribute_count, info.attribute_count, false);
                 pandecode_shader_prop("varying_count", varying_count, info.varying_count, false);
 
-                if (is_bifrost) {
-                        uint32_t opaque = state.preload.uniform_count << 15
-                                | state.preload.untyped;
-
-                        switch (job_type) {
-                        case MALI_JOB_TYPE_VERTEX:
-                                DUMP_CL(PRELOAD_VERTEX, &opaque, "Preload:\n");
-                                break;
-                        case MALI_JOB_TYPE_TILER:
-                                DUMP_CL(PRELOAD_FRAGMENT, &opaque, "Preload:\n");
-                                break;
-                        case MALI_JOB_TYPE_COMPUTE:
-                                DUMP_CL(PRELOAD_COMPUTE, &opaque, "Preload:\n");
-                                break;
-                        default:
-                                DUMP_CL(PRELOAD, &opaque, "Preload:\n");
-                                break;
-                        }
-                }
+                if (is_bifrost)
+                        DUMP_UNPACKED(PRELOAD, state.preload, "Preload:\n");
 
                 if (!is_bifrost) {
                         /* TODO: Blend shaders routing/disasm */
                         union midgard_blend blend;
-                        memcpy(&blend, &state.sfbd_blend, sizeof(blend));
+                        if (state.multisample_misc.sfbd_blend_shader) {
+                                blend.shader = state.sfbd_blend_shader;
+                        } else {
+                                blend.equation.opaque[0] = state.sfbd_blend_equation;
+                                blend.constant = state.sfbd_blend_constant;
+                        }
                         mali_ptr shader = pandecode_midgard_blend(&blend, state.multisample_misc.sfbd_blend_shader);
                         if (shader & ~0xF)
                                 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
diff --git a/src/panfrost/lib/gen_pack.py b/src/panfrost/lib/gen_pack.py
index c93eacdb1bc..46647fc0bdb 100644
--- a/src/panfrost/lib/gen_pack.py
+++ b/src/panfrost/lib/gen_pack.py
@@ -132,6 +132,9 @@ __gen_unpack_padded(const uint8_t *restrict cl, uint32_t start, uint32_t end)
    return (2*odd + 1) << shift;
 }
 
+#define pan_prepare(dst, T)                                 \\
+   *(dst) = (struct MALI_ ## T){ MALI_ ## T ## _header }
+
 #define pan_pack(dst, T, name)                              \\
    for (struct MALI_ ## T name = { MALI_ ## T ## _header }, \\
         *_loop_terminate = (void *) (dst);                  \\
diff --git a/src/panfrost/lib/midgard.xml b/src/panfrost/lib/midgard.xml
index d0e1ea386d6..712e7f94e92 100644
--- a/src/panfrost/lib/midgard.xml
+++ b/src/panfrost/lib/midgard.xml
@@ -449,36 +449,26 @@
     <field name="Surfaces" size="64" start="4:0" type="address"/>
   </struct>
 
-  <struct name="Midgard Properties" size="1">
+  <struct name="Renderer Properties" size="1">
     <field name="Uniform buffer count" size="8" start="0" type="uint"/>
     <field name="Depth source" size="2" start="8" type="Depth Source" default="None"/>
-    <field name="Early-z enable" size="1" start="10" type="bool" default="false"/>
+    <field name="Midgard Early-z enable" size="1" start="10" type="bool" default="false"/>
     <field name="Helper invocation enable" size="1" start="11" type="bool" default="false"/>
     <field name="Reads depth/stencil" size="1" start="12" type="bool" default="false"/>
     <field name="Writes globals" size="1" start="13" type="bool" default="false"/>
+    <field name="Full thread" size="1" start="13" type="bool" default="false"/>
     <field name="Reads tilebuffer" size="1" start="14" type="bool" default="false"/>
     <field name="Work register count" size="5" start="16" type="uint"/>
+    <field name="Bifrost Early-z enable" size="1" start="19" type="bool" default="false"/>
     <field name="Uniform count" size="5" start="21" type="uint"/>
     <field name="Stencil from shader" size="1" start="28" type="bool"/>
     <field name="Suppress Inf/NaN" size="1" start="29" type="bool"/>
-  </struct>
-
-  <struct name="Bifrost Properties" size="1">
-    <field name="Uniform buffer count" size="8" start="0" type="uint"/>
-    <!--- If set, disables registers [R16, R47] for full thread count -->
-    <field name="Full thread" size="1" start="13" type="bool" default="false"/>
-    <field name="Early-z enable" size="1" start="19" type="bool" default="false"/>
     <field name="First ATEST" size="1" start="30" type="bool" default="false"/>
     <!-- XXX: This is awful -->
     <field name="Unknown" size="32" start="0" type="uint"/>
   </struct>
 
   <struct name="Preload" size="1">
-    <field name="Untyped" size="15" start="0" type="uint"/>
-    <field name="Uniform count" size="7" start="15" type="uint"/>
-  </struct>
-
-  <struct name="Preload Compute" size="1">
     <field name="Local Invocation XY" size="1" start="7" type="bool"/>
     <field name="Local Invocation Z" size="1" start="8" type="bool"/>
     <field name="Work group X" size="1" start="9" type="bool"/>
@@ -487,17 +477,9 @@
     <field name="Global Invocation X" size="1" start="12" type="bool"/>
     <field name="Global Invocation Y" size="1" start="13" type="bool"/>
     <field name="Global Invocation Z" size="1" start="14" type="bool"/>
-    <field name="Uniform count" size="7" start="15" type="uint"/>
-  </struct>
-
-  <struct name="Preload Vertex" size="1">
     <field name="Vertex ID" size="1" start="13" type="bool"/>
     <field name="Instance ID" size="1" start="14" type="bool"/>
-    <field name="Uniform count" size="7" start="15" type="uint"/>
-  </struct>
-
-  <struct name="Preload Fragment" size="1">
-    <field name="Unknown" size="1" start="7" type="bool" default="true"/>
+    <field name="Unknown" size="1" start="7" type="bool"/>
     <field name="Primitive ID" size="1" start="9" type="bool"/>
     <field name="Front facing" size="1" start="10" type="bool"/>
     <field name="Fragment position" size="1" start="11" type="bool"/>
@@ -558,9 +540,9 @@
     <field name="Depth Pass" size="3" start="25" type="Stencil Op"/>
   </struct>
 
-  <struct name="Renderer State" with_opaque="true">
+  <struct name="Renderer State">
     <field name="Shader" size="128" start="0:0" type="Shader"/>
-    <field name="Properties" size="32" start="4:0" type="uint"/>
+    <field name="Properties" size="32" start="4:0" type="Renderer Properties"/>
     <field name="Depth units" size="32" start="5:0" type="float"/>
     <field name="Depth factor" size="32" start="6:0" type="float"/>
     <field name="Depth bias clamp" size="32" start="7:0" type="float"/>
@@ -570,7 +552,9 @@
     <field name="Stencil back" size="32" start="11:0" type="Stencil"/>
     <field name="Preload" size="32" start="12:0" type="Preload"/>
     <field name="Thread Balancing" size="16" start="13:0" type="uint"/>
-    <field name="SFBD Blend" size="64" start="14:0" type="uint"/>
+    <field name="SFBD Blend Shader" size="64" start="14:0" type="address"/>
+    <field name="SFBD Blend Equation" size="32" start="14:0" type="uint"/>
+    <field name="SFBD Blend Constant" size="32" start="15:0" type="float"/>
   </struct>
 
   <struct name="Uniform Buffer">
diff --git a/src/panfrost/lib/pan_blit.c b/src/panfrost/lib/pan_blit.c
index 0c06c37db84..b068e02a0e2 100644
--- a/src/panfrost/lib/pan_blit.c
+++ b/src/panfrost/lib/pan_blit.c
@@ -217,13 +217,6 @@ panfrost_load_midg(
                         cfg.color_mask = 0x0;
         }
 
-        union midgard_blend replace = {
-                .equation = eq
-        };
-
-        if (blend_shader)
-                replace.shader = blend_shader;
-
         /* Determine the sampler type needed. Stencil is always sampled as
          * UINT. Pure (U)INT is always (U)INT. Everything else is FLOAT. */
 
@@ -235,27 +228,21 @@ panfrost_load_midg(
 
         bool ms = image->nr_samples > 1;
 
-        struct mali_midgard_properties_packed properties;
-
         struct panfrost_transfer shader_meta_t = panfrost_pool_alloc_aligned(
                 pool, MALI_RENDERER_STATE_LENGTH + 8 * sizeof(struct midgard_blend_rt), 128);
 
-        pan_pack(&properties, MIDGARD_PROPERTIES, cfg) {
-                cfg.work_register_count = 4;
-                cfg.early_z_enable = (loc >= FRAG_RESULT_DATA0);
-                cfg.stencil_from_shader = (loc == FRAG_RESULT_STENCIL);
-                cfg.depth_source = (loc == FRAG_RESULT_DEPTH) ?
-                        MALI_DEPTH_SOURCE_SHADER :
-                        MALI_DEPTH_SOURCE_FIXED_FUNCTION;
-        }
-
         pan_pack(shader_meta_t.cpu, RENDERER_STATE, cfg) {
                 cfg.shader.shader = pool->dev->blit_shaders.loads[loc][T][ms];
                 cfg.shader.varying_count = 1;
                 cfg.shader.texture_count = 1;
                 cfg.shader.sampler_count = 1;
 
-                cfg.properties = properties.opaque[0];
+                cfg.properties.work_register_count = 4;
+                cfg.properties.midgard_early_z_enable = (loc >= FRAG_RESULT_DATA0);
+                cfg.properties.stencil_from_shader = (loc == FRAG_RESULT_STENCIL);
+                cfg.properties.depth_source = (loc == FRAG_RESULT_DEPTH) ?
+                                              MALI_DEPTH_SOURCE_SHADER :
+                                              MALI_DEPTH_SOURCE_FIXED_FUNCTION;
 
                 cfg.multisample_misc.sample_mask = 0xFFFF;
                 cfg.multisample_misc.multisample_enable = ms;
@@ -280,10 +267,15 @@ panfrost_load_midg(
                         cfg.stencil_mask_misc.sfbd_write_enable = true;
                         cfg.stencil_mask_misc.sfbd_dither_disable = true;
                         cfg.stencil_mask_misc.sfbd_srgb = srgb;
-                        cfg.multisample_misc.sfbd_blend_shader = blend_shader;
-                        memcpy(&cfg.sfbd_blend, &replace, sizeof(replace));
+                        cfg.multisample_misc.sfbd_blend_shader = !!blend_shader;
+                        if (cfg.multisample_misc.sfbd_blend_shader) {
+                                cfg.sfbd_blend_shader = blend_shader;
+                        } else {
+                                cfg.sfbd_blend_equation = eq.opaque[0];
+                                cfg.sfbd_blend_constant = 0;
+                        }
                 } else if (!(pool->dev->quirks & IS_BIFROST)) {
-                        memcpy(&cfg.sfbd_blend, &blend_shader, sizeof(blend_shader));
+                        cfg.sfbd_blend_shader = blend_shader;
                 }
 
                 assert(cfg.shader.shader);
@@ -321,6 +313,10 @@ panfrost_load_midg(
                 void *dest = shader_meta_t.cpu + MALI_RENDERER_STATE_LENGTH + sizeof(struct midgard_blend_rt) * i;
 
                 if (loc == (FRAG_RESULT_DATA0 + i)) {
+                        union midgard_blend replace = {
+                                .equation = eq
+                        };
+
                         struct midgard_blend_rt blend_rt = {
                                 .blend = replace,
                         };