From 7bb6ebe9387015ea06f5bb02afb8a0707df4b322 Mon Sep 17 00:00:00 2001 From: Mary Guillemard Date: Thu, 30 Jan 2025 11:56:16 +0000 Subject: [PATCH] pan/decode: Fix indirect branch calculation for 64-bit THe enum variant for u64 was actually 32-bit making all 64-bit operation wrong. Signed-off-by: Mary Guillemard Fixes: 7d0dc3d30ca7 ("pan/decode: Add a helper to print CS binaries without interpreting them") Reviewed-by: Lars-Ivar Hesselberg Simonsen Reviewed-by: Boris Brezillon Reviewed-by: Erik Faye-Lund Part-of: --- src/panfrost/lib/genxml/decode_csf.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/src/panfrost/lib/genxml/decode_csf.c b/src/panfrost/lib/genxml/decode_csf.c index a3b15399405..eba79839b49 100644 --- a/src/panfrost/lib/genxml/decode_csf.c +++ b/src/panfrost/lib/genxml/decode_csf.c @@ -1146,7 +1146,7 @@ record_indirect_branch_target(struct cs_code_cfg *cfg, { union { uint32_t u32[256]; - uint32_t u64[256]; + uint64_t u64[128]; } reg_file = {0}; list_add(&cur_blk->node, blk_stack); @@ -1159,7 +1159,11 @@ record_indirect_branch_target(struct cs_code_cfg *cfg, switch (base.opcode) { case MALI_CS_OPCODE_MOVE: { cs_unpack(instr, CS_MOVE, I); - reg_file.u64[I.destination] = I.immediate; + + assert(I.destination % 2 == 0 && + "Destination register should be aligned to 2"); + + reg_file.u64[I.destination / 2] = I.immediate; break; } @@ -1177,7 +1181,14 @@ record_indirect_branch_target(struct cs_code_cfg *cfg, case MALI_CS_OPCODE_ADD_IMMEDIATE64: { cs_unpack(instr, CS_ADD_IMMEDIATE64, I); - reg_file.u64[I.destination] = reg_file.u64[I.source] + I.immediate; + + assert(I.destination % 2 == 0 && + "Destination register should be aligned to 2"); + assert(I.source % 2 == 0 && + "Source register should be aligned to 2"); + + reg_file.u64[I.destination / 2] = + reg_file.u64[I.source / 2] + I.immediate; break; } @@ -1199,8 +1210,10 @@ record_indirect_branch_target(struct cs_code_cfg *cfg, uint64_t *instr = &cfg->instrs[ibranch->instr_idx]; cs_unpack(instr, CS_JUMP, I); + assert(I.address % 2 == 0 && "Address register should be aligned to 2"); + struct cs_indirect_branch_target target = { - .address = reg_file.u64[I.address], + .address = reg_file.u64[I.address / 2], .length = reg_file.u32[I.length], };