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radeonsi: make the gfx9 DCC MSAA clear shader depend on the number of samples

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because different DCC equations are used.

Fixes: 3120113ee7 - radeonsi: implement DCC MSAA 4x/8x fast clear using DCC equations on gfx9

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10343>
(cherry picked from commit 1f8fa96412)
This commit is contained in:
Marek Olšák 2021-04-20 05:40:46 -04:00 • committed by Dylan Baker
parent c575dae37a
commit 7ba683d490
4 changed files with 10 additions and 6 deletions
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2
.pick_status.json
View file

@ -463,7 +463,7 @@
"description": "radeonsi: make the gfx9 DCC MSAA clear shader depend on the number of samples",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": "3120113ee77621964bb009f9cbd13488b087e734"
},

5
src/gallium/drivers/radeonsi/si_compute_blit.c
View file

@ -693,9 +693,10 @@ void gfx9_clear_dcc_msaa(struct si_context *sctx, struct pipe_resource *res, uin
/* These variables identify the shader variant. */
unsigned swizzle_mode = tex->surface.u.gfx9.swizzle_mode;
unsigned bpe_log2 = util_logbase2(tex->surface.bpe);
bool samples8 = tex->buffer.b.b.nr_storage_samples == 8;
unsigned log2_samples = util_logbase2(tex->buffer.b.b.nr_samples);
bool fragments8 = tex->buffer.b.b.nr_storage_samples == 8;
bool is_array = tex->buffer.b.b.array_size > 1;
void **shader = &sctx->cs_clear_dcc_msaa[swizzle_mode][bpe_log2][samples8][is_array];
void **shader = &sctx->cs_clear_dcc_msaa[swizzle_mode][bpe_log2][fragments8][log2_samples - 2][is_array];
if (!*shader)
*shader = gfx9_create_clear_dcc_msaa_cs(sctx, tex);

6
src/gallium/drivers/radeonsi/si_pipe.c
View file

@ -272,8 +272,10 @@ static void si_destroy_context(struct pipe_context *context)
for (unsigned j = 0; j < ARRAY_SIZE(sctx->cs_clear_dcc_msaa[i]); j++) {
for (unsigned k = 0; k < ARRAY_SIZE(sctx->cs_clear_dcc_msaa[i][j]); k++) {
for (unsigned l = 0; l < ARRAY_SIZE(sctx->cs_clear_dcc_msaa[i][j][k]); l++) {
if (sctx->cs_clear_dcc_msaa[i][j][k][l])
sctx->b.delete_compute_state(&sctx->b, sctx->cs_clear_dcc_msaa[i][j][k][l]);
for (unsigned m = 0; m < ARRAY_SIZE(sctx->cs_clear_dcc_msaa[i][j][k][l]); m++) {
if (sctx->cs_clear_dcc_msaa[i][j][k][l][m])
sctx->b.delete_compute_state(&sctx->b, sctx->cs_clear_dcc_msaa[i][j][k][l][m]);
}
}
}
}

3
src/gallium/drivers/radeonsi/si_pipe.h
View file

@ -1320,7 +1320,8 @@ struct si_context {
/* Shaders. */
/* TODO: move other shaders here too */
void *cs_clear_dcc_msaa[32][5][2][2]; /* [swizzle_mode][log2(bpe)][samples == 8][is_array] */
/* Only used for DCC MSAA clears with 4-8 fragments and 4-16 samples. */
void *cs_clear_dcc_msaa[32][5][2][3][2]; /* [swizzle_mode][log2(bpe)][fragments == 8][log2(samples)-2][is_array] */
};
/* si_blit.c */