nvc0: maxwell isa has no per-instruction join modifier

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Ben Skeggs 2014-05-09 15:56:03 +10:00
parent 07d3972b49
commit 7b9475fa65
4 changed files with 23 additions and 19 deletions

View file

@ -2067,22 +2067,24 @@ FlatteningPass::visit(BasicBlock *bb)
return true;
// try to attach join to previous instruction
Instruction *insn = bb->getExit();
if (insn && insn->op == OP_JOIN && !insn->getPredicate()) {
insn = insn->prev;
if (insn && !insn->getPredicate() &&
!insn->asFlow() &&
insn->op != OP_TEXBAR &&
!isTextureOp(insn->op) && // probably just nve4
!isSurfaceOp(insn->op) && // not confirmed
insn->op != OP_LINTERP && // probably just nve4
insn->op != OP_PINTERP && // probably just nve4
((insn->op != OP_LOAD && insn->op != OP_STORE) ||
typeSizeof(insn->dType) <= 4) &&
!insn->isNop()) {
insn->join = 1;
bb->remove(bb->getExit());
return true;
if (prog->getTarget()->hasJoin) {
Instruction *insn = bb->getExit();
if (insn && insn->op == OP_JOIN && !insn->getPredicate()) {
insn = insn->prev;
if (insn && !insn->getPredicate() &&
!insn->asFlow() &&
insn->op != OP_TEXBAR &&
!isTextureOp(insn->op) && // probably just nve4
!isSurfaceOp(insn->op) && // not confirmed
insn->op != OP_LINTERP && // probably just nve4
insn->op != OP_PINTERP && // probably just nve4
((insn->op != OP_LOAD && insn->op != OP_STORE) ||
typeSizeof(insn->dType) <= 4) &&
!insn->isNop()) {
insn->join = 1;
bb->remove(bb->getExit());
return true;
}
}
}

View file

@ -120,7 +120,7 @@ enum OpClass
class Target
{
public:
Target(bool j, bool s) : joinAnterior(j), hasSWSched(s) { }
Target(bool m, bool j, bool s) : hasJoin(m), joinAnterior(j), hasSWSched(s) { }
virtual ~Target() { }
static Target *create(uint32_t chipset);
@ -192,6 +192,7 @@ public:
virtual uint32_t getSVAddress(DataFile, const Symbol *) const = 0;
public:
const bool hasJoin; // true if instructions have a join modifier
const bool joinAnterior; // true if join is executed before the op
const bool hasSWSched; // true if code should provide scheduling data

View file

@ -29,7 +29,7 @@ Target *getTargetNV50(unsigned int chipset)
return new TargetNV50(chipset);
}
TargetNV50::TargetNV50(unsigned int card) : Target(true, false)
TargetNV50::TargetNV50(unsigned int card) : Target(true, true, false)
{
chipset = card;

View file

@ -29,7 +29,8 @@ Target *getTargetNVC0(unsigned int chipset)
return new TargetNVC0(chipset);
}
TargetNVC0::TargetNVC0(unsigned int card) : Target(false, card >= 0xe4)
TargetNVC0::TargetNVC0(unsigned int card) :
Target(card < 0x110, false, card >= 0xe4)
{
chipset = card;
initOpInfo();