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intel/brw: Consider if SEND is gather variant when setting ex_desc

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SEND instructions of gather variant will use the upcoming ARF scalar
register.  They use only Src0 and reuse the bits of Src1.Length (part of
ex_desc).  Src1.Length is (implicitly) defined as 0.

Adapt the helper functions to take the new variant into account when
manipulating ex_desc.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32236>
This commit is contained in:
Caio Oliveira 2024-11-19 12:56:45 -08:00 • committed by Marge Bot
parent 0c02a7e8e8
commit 7acd84da51
5 changed files with 28 additions and 13 deletions
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2
src/intel/compiler/brw_disasm.c
View file

@ -2132,7 +2132,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa,
brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst));
} else {
has_imm_ex_desc = true;
imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst);
imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst, false);
fprintf(file, "0x%08"PRIx32, imm_ex_desc);
}
} else {

4
src/intel/compiler/brw_eu_emit.c
View file

@ -354,7 +354,7 @@ brw_set_desc_ex(struct brw_codegen *p, brw_inst *inst,
IMM, BRW_TYPE_UD);
brw_inst_set_send_desc(devinfo, inst, desc);
if (devinfo->ver >= 9)
brw_inst_set_send_ex_desc(devinfo, inst, ex_desc);
brw_inst_set_send_ex_desc(devinfo, inst, ex_desc, false);
}
static void
@ -1595,7 +1595,7 @@ brw_send_indirect_split_message(struct brw_codegen *p,
if (ex_desc.file == IMM) {
brw_inst_set_send_sel_reg32_ex_desc(devinfo, send, 0);
brw_inst_set_sends_ex_desc(devinfo, send, ex_desc.ud);
brw_inst_set_sends_ex_desc(devinfo, send, ex_desc.ud, false);
} else {
assert(ex_desc.file == ARF);
assert(ex_desc.nr == BRW_ARF_ADDRESS);

2
src/intel/compiler/brw_eu_validate.c
View file

@ -333,7 +333,7 @@ send_restrictions(const struct brw_isa_info *isa,
unsigned ex_mlen = 1;
if (!brw_inst_send_sel_reg32_ex_desc(devinfo, inst->raw)) {
const uint32_t ex_desc = brw_inst_sends_ex_desc(devinfo, inst->raw);
const uint32_t ex_desc = brw_inst_sends_ex_desc(devinfo, inst->raw, false);
ex_mlen = brw_message_ex_desc_ex_mlen(devinfo, ex_desc) /
reg_unit(devinfo);
}

2
src/intel/compiler/brw_gram.y
View file

@ -936,7 +936,7 @@ sendinstruction:
if ($8.file == IMM) {
brw_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 0);
brw_inst_set_sends_ex_desc(p->devinfo, brw_last_inst, $8.ud);
brw_inst_set_sends_ex_desc(p->devinfo, brw_last_inst, $8.ud, false);
} else {
brw_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 1);
brw_inst_set_send_ex_desc_ia_subreg_nr(p->devinfo, brw_last_inst, $8.subnr >> 2);

31
src/intel/compiler/brw_inst.h
View file

@ -784,14 +784,26 @@ brw_inst_send_desc(const struct intel_device_info *devinfo,
*/
static inline void
brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo,
brw_inst *inst, uint32_t value)
brw_inst *inst, uint32_t value, bool gather)
{
assert(!gather || devinfo->ver >= 30);
if (devinfo->ver >= 12) {
brw_inst_set_bits(inst, 127, 124, GET_BITS(value, 31, 28));
brw_inst_set_bits(inst, 97, 96, GET_BITS(value, 27, 26));
brw_inst_set_bits(inst, 65, 64, GET_BITS(value, 25, 24));
brw_inst_set_bits(inst, 47, 35, GET_BITS(value, 23, 11));
brw_inst_set_bits(inst, 103, 99, GET_BITS(value, 10, 6));
/* SEND gather uses these bits for src0 subreg nr, so they
* are not part of the ex_desc.
*/
if (gather) {
assert(devinfo->ver >= 30);
assert(GET_BITS(value, 10, 6) == 0);
} else {
brw_inst_set_bits(inst, 103, 99, GET_BITS(value, 10, 6));
}
assert(GET_BITS(value, 5, 0) == 0);
} else {
assert(devinfo->ver >= 9);
@ -814,10 +826,10 @@ brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo,
*/
static inline void
brw_inst_set_sends_ex_desc(const struct intel_device_info *devinfo,
brw_inst *inst, uint32_t value)
brw_inst *inst, uint32_t value, bool gather)
{
if (devinfo->ver >= 12) {
brw_inst_set_send_ex_desc(devinfo, inst, value);
brw_inst_set_send_ex_desc(devinfo, inst, value, gather);
} else {
brw_inst_set_bits(inst, 95, 80, GET_BITS(value, 31, 16));
assert(GET_BITS(value, 15, 10) == 0);
@ -833,14 +845,16 @@ brw_inst_set_sends_ex_desc(const struct intel_device_info *devinfo,
*/
static inline uint32_t
brw_inst_send_ex_desc(const struct intel_device_info *devinfo,
const brw_inst *inst)
const brw_inst *inst, bool gather)
{
assert(!gather || devinfo->ver >= 30);
if (devinfo->ver >= 12) {
return (brw_inst_bits(inst, 127, 124) << 28 |
brw_inst_bits(inst, 97, 96) << 26 |
brw_inst_bits(inst, 65, 64) << 24 |
brw_inst_bits(inst, 47, 35) << 11 |
brw_inst_bits(inst, 103, 99) << 6);
(!gather ? brw_inst_bits(inst, 103, 99) << 6 : 0));
} else {
assert(devinfo->ver >= 9);
return (brw_inst_bits(inst, 94, 91) << 28 |
@ -857,11 +871,12 @@ brw_inst_send_ex_desc(const struct intel_device_info *devinfo,
*/
static inline uint32_t
brw_inst_sends_ex_desc(const struct intel_device_info *devinfo,
const brw_inst *inst)
const brw_inst *inst, bool gather)
{
if (devinfo->ver >= 12) {
return brw_inst_send_ex_desc(devinfo, inst);
return brw_inst_send_ex_desc(devinfo, inst, gather);
} else {
assert(!gather);
return (brw_inst_bits(inst, 95, 80) << 16 |
brw_inst_bits(inst, 67, 64) << 6);
}