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iris: actually emit stencil packets

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This commit is contained in:
Kenneth Graunke 2018-08-03 16:18:09 -07:00
parent 753646dd6b
commit 7972599eab
4 changed files with 51 additions and 47 deletions
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28
src/gallium/drivers/iris/iris_clear.c
View file

@ -35,24 +35,6 @@
#include "iris_screen.h"
#include "intel/compiler/brw_compiler.h"
static void
split_depth_stencil_resources(struct pipe_resource *res,
struct pipe_resource **out_z,
struct pipe_resource **out_s)
{
const struct util_format_description *desc =
util_format_description(res->format);
if (util_format_has_depth(desc)) {
*out_z = res;
*out_s = iris_resource_get_separate_stencil(res);
} else {
assert(util_format_has_stencil(desc));
*out_z = NULL;
*out_s = res;
}
}
/**
* The pipe->clear() driver hook.
*
@ -78,22 +60,22 @@ iris_clear(struct pipe_context *ctx,
if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
struct pipe_surface *psurf = cso_fb->zsbuf;
struct pipe_resource *z_res;
struct pipe_resource *stencil_res;
struct iris_resource *z_res;
struct iris_resource *stencil_res;
struct blorp_surf z_surf;
struct blorp_surf stencil_surf;
const unsigned num_layers =
psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1;
split_depth_stencil_resources(psurf->texture, &z_res, &stencil_res);
iris_get_depth_stencil_resources(psurf->texture, &z_res, &stencil_res);
if (z_res) {
iris_blorp_surf_for_resource(&z_surf, z_res,
iris_blorp_surf_for_resource(&z_surf, &z_res->base,
ISL_AUX_USAGE_NONE, true);
}
if (stencil_res) {
iris_blorp_surf_for_resource(&stencil_surf, stencil_res,
iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base,
ISL_AUX_USAGE_NONE, true);
}

24
src/gallium/drivers/iris/iris_resource.c
View file

@ -170,6 +170,30 @@ iris_resource_get_separate_stencil(struct pipe_resource *p_res)
return p_res->next;
}
void
iris_get_depth_stencil_resources(struct pipe_resource *res,
struct iris_resource **out_z,
struct iris_resource **out_s)
{
if (!res) {
*out_z = NULL;
*out_s = NULL;
return;
}
const struct util_format_description *desc =
util_format_description(res->format);
if (util_format_has_depth(desc)) {
*out_z = (void *) res;
*out_s = (void *) iris_resource_get_separate_stencil(res);
} else {
assert(util_format_has_stencil(desc));
*out_z = NULL;
*out_s = (void *) res;
}
}
static void
iris_resource_destroy(struct pipe_screen *screen,
struct pipe_resource *resource)

4
src/gallium/drivers/iris/iris_resource.h
View file

@ -89,6 +89,10 @@ enum isl_format iris_isl_format_for_pipe_format(enum pipe_format pf);
struct pipe_resource *iris_resource_get_separate_stencil(struct pipe_resource *);
void iris_get_depth_stencil_resources(struct pipe_resource *res,
struct iris_resource **out_z,
struct iris_resource **out_s);
void iris_init_screen_resource_functions(struct pipe_screen *pscreen);
#endif

42
src/gallium/drivers/iris/iris_state.c
View file

@ -1641,6 +1641,8 @@ iris_set_framebuffer_state(struct pipe_context *ctx,
struct iris_screen *screen = (struct iris_screen *)ctx->screen;
struct isl_device *isl_dev = &screen->isl_dev;
struct pipe_framebuffer_state *cso = &ice->state.framebuffer;
struct iris_resource *zres;
struct iris_resource *stencil_res;
unsigned samples = util_framebuffer_get_num_samples(state);
@ -1674,41 +1676,33 @@ iris_set_framebuffer_state(struct pipe_context *ctx,
.mocs = MOCS_WB,
};
struct iris_resource *zres =
(void *) (cso->zsbuf ? cso->zsbuf->texture : NULL);
if (zres) {
view.usage |= ISL_SURF_USAGE_DEPTH_BIT;
info.depth_surf = &zres->surf;
info.depth_address = zres->bo->gtt_offset;
view.format = zres->surf.format;
if (cso->zsbuf) {
iris_get_depth_stencil_resources(cso->zsbuf->texture, &zres,
&stencil_res);
view.base_level = cso->zsbuf->u.tex.level;
view.base_array_layer = cso->zsbuf->u.tex.first_layer;
view.array_len =
cso->zsbuf->u.tex.last_layer - cso->zsbuf->u.tex.first_layer + 1;
info.hiz_usage = ISL_AUX_USAGE_NONE;
}
if (zres) {
view.usage |= ISL_SURF_USAGE_DEPTH_BIT;
#if 0
if (stencil_mt) {
view.usage |= ISL_SURF_USAGE_STENCIL_BIT;
info.stencil_surf = &stencil_mt->surf;
info.depth_surf = &zres->surf;
info.depth_address = zres->bo->gtt_offset;
info.hiz_usage = ISL_AUX_USAGE_NONE;
if (!depth_mt) {
view.base_level = stencil_irb->mt_level - stencil_irb->mt->first_level;
view.base_array_layer = stencil_irb->mt_layer;
view.array_len = MAX2(stencil_irb->layer_count, 1);
view.format = stencil_mt->surf.format;
view.format = zres->surf.format;
}
uint32_t stencil_offset = 0;
info.stencil_address = stencil_mt->bo->gtt_offset + stencil_mt->offset;
if (stencil_res) {
view.usage |= ISL_SURF_USAGE_STENCIL_BIT;
info.stencil_surf = &stencil_res->surf;
info.stencil_address = stencil_res->bo->gtt_offset;
if (!zres)
view.format = stencil_res->surf.format;
}
}
#endif
isl_emit_depth_stencil_hiz_s(isl_dev, cso_z->packets, &info);