isl/iris/anv: provide drirc toggle intel_sampler_route_to_lsc

Some applications may benefit from this while some can get a performance
hit. Default to false and make it possible to toggle only for selected
workloads.

See workaround 14022483228 for some measurements.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29760>

src/gallium/drivers/iris/driinfo_iris.h

@@ -7,6 +7,7 @@ DRI_CONF_SECTION_DEBUG
    DRI_CONF_OPT_B(sync_compile, false, "Always compile synchronously (will cause stalls)")
    DRI_CONF_LIMIT_TRIG_INPUT_RANGE(false)
    DRI_CONF_INTEL_ENABLE_WA_14018912822(false)
+   DRI_CONF_INTEL_SAMPLER_ROUTE_TO_LSC(false)
 DRI_CONF_SECTION_END
 
 DRI_CONF_SECTION_PERFORMANCE

src/gallium/drivers/iris/iris_screen.c

@@ -852,6 +852,9 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)
    isl_device_init(&screen->isl_dev, screen->devinfo);
    screen->isl_dev.dummy_aux_address = iris_bufmgr_get_dummy_aux_address(screen->bufmgr);
 
+   screen->isl_dev.sampler_route_to_lsc =
+      driQueryOptionb(config->options, "intel_sampler_route_to_lsc");
+
    iris_compiler_init(screen);
 
    screen->l3_config_3d = iris_get_default_l3_config(screen->devinfo, false);

src/intel/isl/isl.c

@@ -322,6 +322,7 @@ isl_device_init(struct isl_device *dev,
    dev->use_separate_stencil = ISL_GFX_VER(dev) >= 6;
    dev->has_bit6_swizzling = info->has_bit6_swizzle;
    dev->buffer_length_in_aux_addr = false;
+   dev->sampler_route_to_lsc = false;
 
    /* The ISL_DEV macros may be defined in the CFLAGS, thus hardcoding some
     * device properties at buildtime. Verify that the macros with the device

src/intel/isl/isl.h

@@ -1332,6 +1332,7 @@ struct isl_device {
    } mocs;
 
    /* Options to configure by the driver: */
+   bool sampler_route_to_lsc;
 
    /**
     * Write buffer length in the upper dword of the

src/intel/isl/isl_surface_state.c

@@ -580,9 +580,8 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
 
 #if GFX_VERx10 >= 200
    s.EnableSamplerRoutetoLSC =
-      isl_format_support_sampler_route_to_lsc(info->view->format);
-   s.EnableSamplerRoutetoLSC &= (s.SurfaceType == SURFTYPE_2D &&
-                                 info->view->array_len == 1);
+      isl_format_support_sampler_route_to_lsc(info->view->format) &&
+      s.SurfaceType == SURFTYPE_2D && info->view->array_len == 1;
 
 /* Wa_14018471104:
  * For APIs that use ResourceMinLod, do the following: (remains same as before)
@@ -592,6 +591,9 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
 #if INTEL_NEEDS_WA_14018471104
    s.EnableSamplerRoutetoLSC &= info->view->min_lod_clamp == 0;
 #endif
+
+   /* Per application override. */
+   s.EnableSamplerRoutetoLSC &= dev->sampler_route_to_lsc;
 #endif /* if GFX_VERx10 >= 200 */
 
 #else

src/intel/vulkan/anv_device.c

@@ -87,6 +87,7 @@ static const driOptionDescription anv_dri_options[] = {
       DRI_CONF_ANV_GENERATED_INDIRECT_RING_THRESHOLD(100)
       DRI_CONF_NO_16BIT(false)
       DRI_CONF_INTEL_ENABLE_WA_14018912822(false)
+      DRI_CONF_INTEL_SAMPLER_ROUTE_TO_LSC(false)
       DRI_CONF_ANV_QUERY_CLEAR_WITH_BLORP_THRESHOLD(6)
       DRI_CONF_ANV_QUERY_COPY_WITH_SHADER_THRESHOLD(6)
       DRI_CONF_ANV_FORCE_INDIRECT_DESCRIPTORS(false)
@@ -2556,6 +2557,8 @@ anv_physical_device_try_create(struct vk_instance *vk_instance,
 
    isl_device_init(&device->isl_dev, &device->info);
    device->isl_dev.buffer_length_in_aux_addr = !intel_needs_workaround(device->isl_dev.info, 14019708328);
+   device->isl_dev.sampler_route_to_lsc =
+      driQueryOptionb(&instance->dri_options, "intel_sampler_route_to_lsc");
 
    result = anv_physical_device_init_uuids(device);
    if (result != VK_SUCCESS)

src/util/driconf.h

@@ -328,6 +328,10 @@
    DRI_CONF_OPT_B(intel_enable_wa_14018912822, def, \
                   "Intel workaround for using zero blend constants")
 
+#define DRI_CONF_INTEL_SAMPLER_ROUTE_TO_LSC(def) \
+   DRI_CONF_OPT_B(intel_sampler_route_to_lsc, def, \
+                  "Intel specific toggle to enable sampler route to LSC")
+
 #define DRI_CONF_VK_REQUIRE_ETC2(def) \
   DRI_CONF_OPT_B(vk_require_etc2, def, \
                  "Implement emulated ETC2 on HW that does not support it")