gallium/swr: fix gcc warnings

Few changes to make gcc happy.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3629>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3629>
This commit is contained in:
Krzysztof Raszkowski 2020-01-29 16:46:04 +01:00
parent 8405e1bef0
commit 790516db0b
8 changed files with 34 additions and 32 deletions

View file

@ -191,6 +191,10 @@ swr_cpp_args = [cpp_vis_args]
if cpp.has_argument('-fno-strict-aliasing')
swr_cpp_args += '-fno-strict-aliasing'
endif
if cpp.has_argument('-Wno-aligned-new')
swr_cpp_args += '-Wno-aligned-new'
endif
swr_arch_libs = []
swr_defines = []

View file

@ -100,6 +100,12 @@ template <typename SIMD_T, SWR_FORMAT Format>
INLINE Float<SIMD_T> SIMDCALL Clamp(Float<SIMD_T> const& v, uint32_t Component)
{
Float<SIMD_T> vComp = v;
if (Component >= 4 || Component < 0)
{
// Component shouldn't out of <0;3> range
assert(false);
return vComp;
}
if (FormatTraits<Format>::isNormalized(Component))
{
if (FormatTraits<Format>::GetType(Component) == SWR_TYPE_UNORM)

View file

@ -704,7 +704,6 @@ void ProcessStreamIdBuffer(uint32_t stream,
{
SWR_ASSERT(stream < MAX_SO_STREAMS);
uint32_t numInputBytes = AlignUp(numEmittedVerts * 2, 8) / 8;
uint32_t numOutputBytes = AlignUp(numEmittedVerts, 8) / 8;
for (uint32_t b = 0; b < numOutputBytes; ++b)
@ -1553,7 +1552,7 @@ static void TessellationStages(DRAW_CONTEXT* pDC,
// Gather data from the SVG if provided.
simd16scalari vViewportIdx = SIMD16::setzero_si();
simd16scalari vRtIdx = SIMD16::setzero_si();
SIMD16::Vec4 svgAttrib[4];
SIMD16::Vec4 svgAttrib[4] = {SIMD16::setzero_ps()};
if (state.backendState.readViewportArrayIndex ||
state.backendState.readRenderTargetArrayIndex)

View file

@ -179,7 +179,9 @@ INT32 floatToIDotF( const float& input )
if (iShift >= 0)
{
// assert( iShift < 32 );
#if defined(_WIN32) || defined(_WIN64)
#pragma warning( suppress : 4293 )
#endif
_fxpMaxPosValueFloat -= INT32( 1 ) << iShift;
}
@ -199,7 +201,9 @@ INT32 floatToIDotF( const float& input )
if (iShift >= 0)
{
// assert( iShift < 32 );
#if defined(_WIN32) || defined(_WIN64)
#pragma warning( suppress : 4293 )
#endif
_fxpMaxPosValueFloat -= INT32( 1 ) << iShift;
}
@ -542,7 +546,7 @@ void CHWTessellator::QuadProcessTessFactors( float tessFactor_Ueq0, float tessFa
}
// Clamp edge TessFactors
float lowerBound, upperBound;
float lowerBound = 0.0, upperBound = 0.0;
switch(m_originalPartitioning)
{
case D3D11_TESSELLATOR_PARTITIONING_INTEGER:
@ -1060,7 +1064,7 @@ void CHWTessellator::TriProcessTessFactors( float tessFactor_Ueq0, float tessFac
}
// Clamp edge TessFactors
float lowerBound, upperBound;
float lowerBound = 0.0, upperBound = 0.0;
switch(m_originalPartitioning)
{
case D3D11_TESSELLATOR_PARTITIONING_INTEGER:
@ -1435,7 +1439,7 @@ void CHWTessellator::IsoLineProcessTessFactors( float TessFactor_V_LineDensity,
}
// Clamp edge TessFactors
float lowerBound, upperBound;
float lowerBound = 0.0, upperBound = 0.0;
switch(m_originalPartitioning)
{
case D3D11_TESSELLATOR_PARTITIONING_INTEGER:
@ -2236,15 +2240,13 @@ void CHLSLTessellator::QuadHLSLProcessTessFactors( float tessFactor_Ueq0, float
// Process outside tessFactors
float outsideTessFactor[QUAD_EDGES] = {tessFactor_Ueq0, tessFactor_Veq0, tessFactor_Ueq1, tessFactor_Veq1};
int edge, axis;
TESSELLATOR_PARITY insideTessFactorParity[QUAD_AXES], outsideTessFactorParity[QUAD_EDGES];
TESSELLATOR_PARITY insideTessFactorParity[QUAD_AXES];
if( Pow2Partitioning() || IntegerPartitioning() )
{
for( edge = 0; edge < QUAD_EDGES; edge++ )
{
RoundUpTessFactor(outsideTessFactor[edge]);
ClampTessFactor(outsideTessFactor[edge]); // clamp unbounded user input based on tessellation mode
int edgeEven = isEven(outsideTessFactor[edge]);
outsideTessFactorParity[edge] = edgeEven ? TESSELLATOR_PARITY_EVEN : TESSELLATOR_PARITY_ODD;
}
}
else
@ -2253,7 +2255,6 @@ void CHLSLTessellator::QuadHLSLProcessTessFactors( float tessFactor_Ueq0, float
for( edge = 0; edge < QUAD_EDGES; edge++ )
{
ClampTessFactor(outsideTessFactor[edge]); // clamp unbounded user input based on tessellation mode
outsideTessFactorParity[edge] = m_originalParity;
}
}
@ -2588,18 +2589,10 @@ void CHLSLTessellator::IsoLineHLSLProcessTessFactors( float TessFactor_V_LineDen
m_LastUnRoundedComputedTessFactors[1] = TessFactor_U_LineDetail; // Save off TessFactors so they can be returned to app
TESSELLATOR_PARITY parity;
if(Pow2Partitioning()||IntegerPartitioning())
{
RoundUpTessFactor(TessFactor_U_LineDetail);
parity = isEven(TessFactor_U_LineDetail) ? TESSELLATOR_PARITY_EVEN : TESSELLATOR_PARITY_ODD;
}
else
{
parity = m_originalParity;
}
FXP fxpTessFactor_U_LineDetail = floatToFixed(TessFactor_U_LineDetail);
OverridePartitioning(D3D11_TESSELLATOR_PARTITIONING_INTEGER);

View file

@ -74,7 +74,7 @@
//=================================================================================================================================
// Data types for the caller
//=================================================================================================================================
typedef enum D3D11_TESSELLATOR_PARTITIONING
enum D3D11_TESSELLATOR_PARTITIONING
{
D3D11_TESSELLATOR_PARTITIONING_INTEGER,
D3D11_TESSELLATOR_PARTITIONING_POW2,
@ -82,20 +82,20 @@ typedef enum D3D11_TESSELLATOR_PARTITIONING
D3D11_TESSELLATOR_PARTITIONING_FRACTIONAL_EVEN
};
typedef enum D3D11_TESSELLATOR_REDUCTION
enum D3D11_TESSELLATOR_REDUCTION
{
D3D11_TESSELLATOR_REDUCTION_MIN,
D3D11_TESSELLATOR_REDUCTION_MAX,
D3D11_TESSELLATOR_REDUCTION_AVERAGE
};
typedef enum D3D11_TESSELLATOR_QUAD_REDUCTION_AXIS
enum D3D11_TESSELLATOR_QUAD_REDUCTION_AXIS
{
D3D11_TESSELLATOR_QUAD_REDUCTION_1_AXIS,
D3D11_TESSELLATOR_QUAD_REDUCTION_2_AXIS
};
typedef enum D3D11_TESSELLATOR_OUTPUT_PRIMITIVE
enum D3D11_TESSELLATOR_OUTPUT_PRIMITIVE
{
D3D11_TESSELLATOR_OUTPUT_POINT,
D3D11_TESSELLATOR_OUTPUT_LINE,
@ -177,7 +177,7 @@ public:
static const int TRI_EDGES = 3;
//=============================================================================================================================
typedef enum TESSELLATOR_PARITY // derived from D3D11_TESSELLATOR_PARTITIONING
enum TESSELLATOR_PARITY // derived from D3D11_TESSELLATOR_PARTITIONING
{ // (note: for integer tessellation, both parities are used)
TESSELLATOR_PARITY_EVEN,
TESSELLATOR_PARITY_ODD
@ -310,7 +310,7 @@ private:
int outsideEdgePointBaseOffset, int outsideNumHalfTessFactorPoints,
TESSELLATOR_PARITY outsideEdgeTessFactorParity );
// The interior can just use a simpler stitch.
typedef enum DIAGONALS
enum DIAGONALS
{
DIAGONALS_INSIDE_TO_OUTSIDE,
DIAGONALS_INSIDE_TO_OUTSIDE_EXCEPT_MIDDLE,

View file

@ -507,7 +507,7 @@ namespace SwrJit
uint32_t numElem = vSrc->getType()->getVectorNumElements();
auto i32Scale = B->Z_EXT(i8Scale, B->mInt32Ty);
auto srcTy = vSrc->getType()->getVectorElementType();
Value* v32Gather;
Value* v32Gather = nullptr;
if (arch == AVX)
{
// Full emulation for AVX
@ -536,7 +536,7 @@ namespace SwrJit
}
else if (arch == AVX2 || (arch == AVX512 && width == W256))
{
Function* pX86IntrinFunc;
Function* pX86IntrinFunc = nullptr;
if (srcTy == B->mFP32Ty)
{
pX86IntrinFunc = Intrinsic::getDeclaration(B->JM()->mpCurrentModule,
@ -627,8 +627,8 @@ namespace SwrJit
}
else if (arch == AVX512)
{
Value* iMask;
Function* pX86IntrinFunc;
Value* iMask = nullptr;
Function* pX86IntrinFunc = nullptr;
if (srcTy == B->mFP32Ty)
{
pX86IntrinFunc = Intrinsic::getDeclaration(B->JM()->mpCurrentModule,

View file

@ -72,7 +72,7 @@ swr_screen(struct pipe_screen *pipe)
SWR_FORMAT
mesa_to_swr_format(enum pipe_format format);
static void swr_print_info(const char *format, ...)
INLINE void swr_print_info(const char *format, ...)
{
static bool print_info = debug_get_bool_option("SWR_PRINT_INFO", false);
if(print_info) {

View file

@ -1623,10 +1623,10 @@ BuilderSWR::CompileTES(struct swr_context *ctx, swr_jit_tes_key &key)
unsigned tes_spacing = info->properties[TGSI_PROPERTY_TES_SPACING];
bool tes_vertex_order_cw = info->properties[TGSI_PROPERTY_TES_VERTEX_ORDER_CW];
bool tes_point_mode = info->properties[TGSI_PROPERTY_TES_POINT_MODE];
SWR_TS_DOMAIN type;
SWR_TS_PARTITIONING partitioning;
SWR_TS_OUTPUT_TOPOLOGY topology;
PRIMITIVE_TOPOLOGY postDSTopology;
SWR_TS_DOMAIN type = SWR_TS_ISOLINE;
SWR_TS_PARTITIONING partitioning = SWR_TS_EVEN_FRACTIONAL;
SWR_TS_OUTPUT_TOPOLOGY topology = SWR_TS_OUTPUT_POINT;
PRIMITIVE_TOPOLOGY postDSTopology = TOP_POINT_LIST;
// TESS_TODO: move this to helper functions to improve readability
switch (tes_prim_mode) {