diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index af27ab1450c..143d7e43bf6 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1424,13 +1424,29 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws, sscreen->debug_flags & DBG(DPBB)); if (sscreen->dpbb_allowed) { - /* Only bin draws that have no CONTEXT and SH register changes between them because higher - * settings cause hangs. We've only been able to reproduce hangs on smaller chips - * (e.g. Navi24, GFX1103), though all chips might have them. What we see may be due to - * a driver bug. - */ - sscreen->pbb_context_states_per_bin = 1; - sscreen->pbb_persistent_states_per_bin = 1; + if ((sscreen->info.has_dedicated_vram && sscreen->info.max_render_backends > 4) || + sscreen->info.gfx_level >= GFX10) { + /* Only bin draws that have no CONTEXT and SH register changes between + * them because higher settings cause hangs. We've only been able to + * reproduce hangs on smaller chips (e.g. Navi24, GFX1103), though all + * chips might have them. What we see may be due to a driver bug. + */ + sscreen->pbb_context_states_per_bin = 1; + sscreen->pbb_persistent_states_per_bin = 1; + } else { + /* This is a workaround for: + * https://bugs.freedesktop.org/show_bug.cgi?id=110214 + * (an alternative is to insert manual BATCH_BREAK event when + * a context_roll is detected). */ + sscreen->pbb_context_states_per_bin = sscreen->info.has_gfx9_scissor_bug ? 1 : 3; + sscreen->pbb_persistent_states_per_bin = 8; + } + + if (!sscreen->info.has_gfx9_scissor_bug) + sscreen->pbb_context_states_per_bin = + debug_get_num_option("AMD_DEBUG_DPBB_CS", sscreen->pbb_context_states_per_bin); + sscreen->pbb_persistent_states_per_bin = + debug_get_num_option("AMD_DEBUG_DPBB_PS", sscreen->pbb_persistent_states_per_bin); assert(sscreen->pbb_context_states_per_bin >= 1 && sscreen->pbb_context_states_per_bin <= 6);