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freedreno/ir3: Handle instr->address when cloning

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Without this, a cloned instruction that takes full regs will trigger an
ir3_validate assert.  This can happen, for ex, if an instruction that
writes p0.x and has a relative src gets cloned in ir3_sched.

Fixes an assert in Genshin Impact with a debug build.

Fixes: 9af795d9b9 ("ir3: Make ir3_instruction::address a normal register")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14231>
This commit is contained in:
Rob Clark 2021-12-01 17:06:20 -08:00 • committed by Marge Bot
parent 1d21de788d
commit 78c53f4888
1 changed files with 5 additions and 0 deletions
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5
src/freedreno/ir3/ir3.c
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@ -493,6 +493,11 @@ ir3_instr_clone(struct ir3_instruction *instr)
*new_reg = *reg;
}
if (instr->address) {
assert(instr->srcs_count > 0);
new_instr->address = new_instr->srcs[instr->srcs_count - 1];
}
return new_instr;
}