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radeonsi: enable nir_io_compaction_groups_tes_inputs_into_pos_and_var_groups
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It's only useful when TES culls.

shader-db with ACO:
    143 shaders have -1.44% average decrease in code size.
    There are fewer input loads and more of them are vec4 instead of vec1-3.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32262>
This commit is contained in:
Marek Olšák 2025-03-16 16:57:33 -04:00 • committed by Marge Bot
parent 0836e9758b
commit 78a3b48db0
1 changed files with 3 additions and 1 deletions
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4
src/gallium/drivers/radeonsi/si_get.c
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@ -901,7 +901,9 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
* when execution mode is rtz instead of rtne.
*/
options->force_f2f16_rtz = true;
options->io_options |= (!has_mediump ? nir_io_mediump_is_32bit : 0) | nir_io_has_intrinsics;
options->io_options |= (!has_mediump ? nir_io_mediump_is_32bit : 0) | nir_io_has_intrinsics |
(sscreen->use_ngg_culling ?
nir_io_compaction_groups_tes_inputs_into_pos_and_var_groups : 0);
options->lower_mediump_io = has_mediump ? si_lower_mediump_io : NULL;
/* HW supports indirect indexing for: | Enabled in driver
* -------------------------------------------------------