diff --git a/src/freedreno/vulkan/tu_clear_blit.cc b/src/freedreno/vulkan/tu_clear_blit.cc
index 5567ee7b8ff..95f5e6a75b8 100644
--- a/src/freedreno/vulkan/tu_clear_blit.cc
+++ b/src/freedreno/vulkan/tu_clear_blit.cc
@@ -883,6 +883,9 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, enum r3d_type type,
    tu6_emit_xs(cs, MESA_SHADER_VERTEX, vs, &pvtmem, vs_iova);
    tu6_emit_xs(cs, MESA_SHADER_FRAGMENT, fs, &pvtmem, fs_iova);
 
+   tu6_emit_xs_constants(cs, MESA_SHADER_VERTEX, vs, vs_iova);
+   tu6_emit_xs_constants(cs, MESA_SHADER_FRAGMENT, fs, fs_iova);
+
    tu_cs_emit_regs(cs, PC_CNTL(CHIP));
    if (CHIP == A7XX) {
       tu_cs_emit_regs(cs, VPC_PC_CNTL(CHIP));
diff --git a/src/freedreno/vulkan/tu_shader.cc b/src/freedreno/vulkan/tu_shader.cc
index b9997fb6c4d..273e9cdb06d 100644
--- a/src/freedreno/vulkan/tu_shader.cc
+++ b/src/freedreno/vulkan/tu_shader.cc
@@ -1662,6 +1662,17 @@ tu6_emit_xs(struct tu_cs *cs,
       tu_cs_emit_pkt4(cs, cfg->reg_sp_xs_vgpr_config, 1);
       tu_cs_emit(cs, 0);
    }
+}
+
+void
+tu6_emit_xs_constants(
+   struct tu_cs *cs,
+   mesa_shader_stage stage, /* xs->type, but xs may be NULL */
+   const struct ir3_shader_variant *xs,
+   uint64_t binary_iova)
+{
+   if (!xs)
+      return;
 
    if (cs->device->physical_device->info->chip == A6XX) {
       uint32_t shader_preload_size =
@@ -1778,6 +1789,7 @@ tu6_emit_cs_config(struct tu_cs *cs,
       tu6_emit_xs_config<CHIP>(crb, MESA_SHADER_COMPUTE, v);
    }
    tu6_emit_xs(cs, MESA_SHADER_COMPUTE, v, pvtmem, binary_iova);
+   tu6_emit_xs_constants(cs, MESA_SHADER_COMPUTE, v, binary_iova);
 
    tu_crb crb = cs->crb(0);
 
@@ -2409,6 +2421,8 @@ tu6_emit_variant(struct tu_cs *cs,
    default:
       UNREACHABLE("unknown shader stage");
    }
+
+   tu6_emit_xs_constants(cs, stage, xs, binary_iova);
 }
 
 static VkResult
diff --git a/src/freedreno/vulkan/tu_shader.h b/src/freedreno/vulkan/tu_shader.h
index 8bad650d960..f85f5a66e88 100644
--- a/src/freedreno/vulkan/tu_shader.h
+++ b/src/freedreno/vulkan/tu_shader.h
@@ -158,6 +158,12 @@ tu6_emit_xs(struct tu_cs *cs,
             const struct tu_pvtmem_config *pvtmem,
             uint64_t binary_iova);
 
+void
+tu6_emit_xs_constants(struct tu_cs *cs,
+                      mesa_shader_stage stage,
+                      const struct ir3_shader_variant *xs,
+                      uint64_t binary_iova);
+
 template <chip CHIP>
 void
 tu6_emit_vs(struct tu_cs *cs, const struct ir3_shader_variant *vs,