diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index e29817b8450..7caba87e134 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -5500,7 +5500,10 @@ visit_load_push_constant(isel_context* ctx, nir_intrinsic_instr* instr)
    unsigned count = instr->dest.ssa.num_components;
    nir_const_value* index_cv = nir_src_as_const_value(instr->src[0]);
 
-   if (index_cv && instr->dest.ssa.bit_size == 32) {
+   if (instr->dest.ssa.bit_size == 64)
+      count *= 2;
+
+   if (index_cv && instr->dest.ssa.bit_size >= 32) {
       unsigned start = (offset + index_cv->u32) / 4u;
       uint64_t mask = BITFIELD64_MASK(count) << start;
       if ((ctx->args->ac.inline_push_const_mask | mask) == ctx->args->ac.inline_push_const_mask &&
diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index 1b3caabb6ad..69288036967 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -1655,10 +1655,13 @@ static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx, nir_int
    /* Load constant values from user SGPRS when possible, otherwise
     * fallback to the default path that loads directly from memory.
     */
-   if (LLVMIsConstant(src0) && instr->dest.ssa.bit_size == 32) {
+   if (LLVMIsConstant(src0) && instr->dest.ssa.bit_size >= 32) {
       unsigned count = instr->dest.ssa.num_components;
       unsigned offset = index;
 
+      if (instr->dest.ssa.bit_size == 64)
+         count *= 2;
+
       offset += LLVMConstIntGetZExtValue(src0);
       offset /= 4;
 
@@ -1670,7 +1673,10 @@ static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx, nir_int
             util_bitcount64(ctx->args->inline_push_const_mask & BITFIELD64_MASK(offset));
          for (unsigned i = 0; i < count; i++)
             push_constants[i] = ac_get_arg(&ctx->ac, ctx->args->inline_push_consts[arg_index++]);
-         return ac_build_gather_values(&ctx->ac, push_constants, count);
+         LLVMValueRef res = ac_build_gather_values(&ctx->ac, push_constants, count);
+         return instr->dest.ssa.bit_size == 64
+                   ? LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "")
+                   : res;
       }
    }
 
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index baef1dc6f4a..f374ad29773 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -98,7 +98,7 @@ gather_push_constant_info(const nir_shader *nir, const nir_intrinsic_instr *inst
 {
    info->loads_push_constants = true;
 
-   if (nir_src_is_const(instr->src[0]) && instr->dest.ssa.bit_size == 32) {
+   if (nir_src_is_const(instr->src[0]) && instr->dest.ssa.bit_size >= 32) {
       uint32_t start = (nir_intrinsic_base(instr) + nir_src_as_uint(instr->src[0])) / 4u;
       uint32_t size = instr->num_components * (instr->dest.ssa.bit_size / 32u);