diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 3964dc79d81..ae370fcdc7f 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -3305,13 +3305,14 @@ radv_intersect_scissor(const VkRect2D *a, const VkRect2D *b)
 }
 
 static void
-radv_emit_scissor(struct radv_cmd_buffer *cmd_buffer)
+radv_emit_scissor_state(struct radv_cmd_buffer *cmd_buffer)
 {
    const struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
    const struct radv_physical_device *pdev = radv_device_physical(device);
    const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
    struct radv_cmd_stream *cs = cmd_buffer->cs;
 
+   cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_SCISSOR_STATE;
    if (!d->vk.vp.scissor_count)
       return;
 
@@ -5387,9 +5388,6 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const ui
    struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
    const struct radv_physical_device *pdev = radv_device_physical(device);
 
-   if (states & (RADV_DYNAMIC_SCISSOR | RADV_DYNAMIC_VIEWPORT) && !pdev->info.has_gfx9_scissor_bug)
-      radv_emit_scissor(cmd_buffer);
-
    if ((states & RADV_DYNAMIC_PRIMITIVE_TOPOLOGY) ||
        (pdev->info.gfx_level >= GFX12 && states & RADV_DYNAMIC_PATCH_CONTROL_POINTS))
       radv_emit_primitive_topology(cmd_buffer);
@@ -11468,6 +11466,9 @@ radv_validate_dynamic_states(struct radv_cmd_buffer *cmd_buffer, uint64_t dynami
 
    if (dynamic_states & (RADV_DYNAMIC_SAMPLE_LOCATIONS | RADV_DYNAMIC_SAMPLE_LOCATIONS_ENABLE))
       cmd_buffer->state.dirty |= RADV_CMD_DIRTY_SAMPLE_LOCATIONS_STATE;
+
+   if (dynamic_states & (RADV_DYNAMIC_SCISSOR | RADV_DYNAMIC_VIEWPORT) && !pdev->info.has_gfx9_scissor_bug)
+      cmd_buffer->state.dirty |= RADV_CMD_DIRTY_SCISSOR_STATE;
 }
 
 static void
@@ -11572,6 +11573,9 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
    if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_VIEWPORT_STATE)
       radv_emit_viewport_state(cmd_buffer);
 
+   if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_SCISSOR_STATE)
+      radv_emit_scissor_state(cmd_buffer);
+
    if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RASTER_STATE)
       radv_emit_raster_state(cmd_buffer);
 
@@ -11607,7 +11611,7 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
    radv_emit_draw_registers(cmd_buffer, info);
 
    if (late_scissor_emission) {
-      radv_emit_scissor(cmd_buffer);
+      radv_emit_scissor_state(cmd_buffer);
       cmd_buffer->cs->context_roll_without_scissor_emitted = false;
    }
 }
diff --git a/src/amd/vulkan/radv_cmd_buffer.h b/src/amd/vulkan/radv_cmd_buffer.h
index bd2bbc38f9a..f264b307ee8 100644
--- a/src/amd/vulkan/radv_cmd_buffer.h
+++ b/src/amd/vulkan/radv_cmd_buffer.h
@@ -114,7 +114,8 @@ enum radv_cmd_dirty_bits {
    RADV_CMD_DIRTY_VS_PROLOG_STATE = 1ull << 28,
    RADV_CMD_DIRTY_BLEND_CONSTANTS_STATE = 1ull << 29,
    RADV_CMD_DIRTY_SAMPLE_LOCATIONS_STATE = 1ull << 30,
-   RADV_CMD_DIRTY_ALL = (1ull << 31) - 1,
+   RADV_CMD_DIRTY_SCISSOR_STATE = 1ull << 31,
+   RADV_CMD_DIRTY_ALL = (1ull << 32) - 1,
 
    RADV_CMD_DIRTY_SHADER_QUERY = RADV_CMD_DIRTY_NGG_STATE | RADV_CMD_DIRTY_TASK_STATE,
 };