fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 09:38:07 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

anv/video: use correct offset for MPR row store scratch buffer.

Browse source 
While playing with zink video, I found this was using the wrong
offset.

Fixes: 98c58a16ef ("anv: add initial video decode support for h264.")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30143>
(cherry picked from commit d94a40fe08)
This commit is contained in:
Dave Airlie 2024-07-12 16:01:58 +10:00 • committed by Eric Engestrom
parent a1520aeacb
commit 76d0096f6a
2 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.pick_status.json
View file

@ -1364,7 +1364,7 @@
"description": "anv/video: use correct offset for MPR row store scratch buffer.",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "98c58a16ef1ab2208693505a88e597202cc3c2a1",
"notes": null

2
src/intel/vulkan/genX_cmd_video.c
View file

@ -1001,7 +1001,7 @@ anv_h264_decode_video(struct anv_cmd_buffer *cmd_buffer,
.MOCS = anv_mocs(cmd_buffer->device, bsp.BSDMPCRowStoreScratchBufferAddress.bo, 0),
};
bsp.MPRRowStoreScratchBufferAddress = (struct anv_address) { vid->vid_mem[ANV_VID_MEM_H264_MPR_ROW_SCRATCH].mem->bo,
vid->vid_mem[ANV_VID_MEM_H264_BSD_MPC_ROW_SCRATCH].offset };
vid->vid_mem[ANV_VID_MEM_H264_MPR_ROW_SCRATCH].offset };
bsp.MPRRowStoreScratchBufferAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, bsp.MPRRowStoreScratchBufferAddress.bo, 0),