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tu: Set GRAS_MODE_CNTL once

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Don't set it before the render pass, that's unnecessary. In the future
we may want to move this to the FS state object, as the blob does, but
for now don't set it unnecessarily.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38581>
This commit is contained in:
Connor Abbott 2025-11-21 14:36:34 -05:00 • committed by Marge Bot
parent d63581a246
commit 76c5fb50ac
2 changed files with 1 additions and 5 deletions
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2
src/freedreno/vulkan/tu_clear_blit.cc
View file

@ -889,8 +889,6 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, enum r3d_type type,
tu6_emit_vpc<CHIP>(cs, vs, NULL, NULL, NULL, fs);
if (CHIP >= A7XX) {
tu_cs_emit_regs(cs, GRAS_MODE_CNTL(CHIP, 0x2));
tu_cs_emit_regs(cs, A7XX_SP_RENDER_CNTL(.fs_disable = false));
}

4
src/freedreno/vulkan/tu_cmd_buffer.cc
View file

@ -1988,7 +1988,7 @@ tu6_init_static_regs(struct tu_device *dev, struct tu_cs *cs)
tu_cs_emit_regs(cs, A6XX_VFD_MODE_CNTL(.vertex = true, .instance = true));
tu_cs_emit_write_reg(cs, REG_A6XX_RB_MODE_CNTL, 0x00000010);
tu_cs_emit_regs(cs, GRAS_MODE_CNTL(CHIP));
tu_cs_emit_regs(cs, GRAS_MODE_CNTL(CHIP, CHIP >= A7XX ? 0x2 : 0));
tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8818, 0);
@ -2103,7 +2103,6 @@ tu7_emit_tile_render_begin_regs(struct tu_cs *cs)
tu_cs_emit_regs(cs,
A7XX_RB_BUFFER_CNTL(0x0));
tu_cs_emit_regs(cs, GRAS_MODE_CNTL(A7XX, 0x2));
tu_cs_emit_regs(cs, A7XX_RB_UNKNOWN_8E09(0x4));
tu_cs_emit_regs(cs, A7XX_RB_CLEAR_TARGET(.clear_mode = CLEAR_MODE_GMEM));
@ -2985,7 +2984,6 @@ tu6_sysmem_render_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs,
.rt7_sysmem = true,
));
tu_cs_emit_regs(cs, GRAS_MODE_CNTL(A7XX, 0x2));
tu_cs_emit_regs(cs, A7XX_RB_UNKNOWN_8E09(0x4));
tu_cs_emit_regs(cs, A7XX_RB_CLEAR_TARGET(.clear_mode = CLEAR_MODE_SYSMEM));