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radeonsi: fix piglit image coherency test when use aco

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spec@arb_shader_image_load_store@coherency will write to coherent
image in tess shader and read it in fragmant shader. There is a
geometry shader in between.

When lower ngg for the geometry shader, it will wait memory writes
before pos0 export if there's no param output to prevent fragment
shader start early and read any previous memory writes.

We need to update the memory writes info of GS with ES ones because
ES and GS is merged into one shader but when nir they are separated.
LLVM does not have this problem because it will add memory write
wait at the beginning of GS automatically.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26122>
This commit is contained in:
Qiang Yu 2023-11-09 15:17:28 +08:00 • committed by Marge Bot
parent 7dcca9d0ef
commit 768c5934d0
1 changed files with 4 additions and 0 deletions
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4
src/gallium/drivers/radeonsi/si_shader.c
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@ -1888,6 +1888,10 @@ static void si_lower_ngg(struct si_shader *shader, nir_shader *nir)
options.has_gen_prim_query = options.has_xfb_prim_query =
sel->screen->info.gfx_level >= GFX11;
/* For monolithic ES/GS to add vscnt wait when GS export pos0. */
if (key->ge.part.gs.es)
nir->info.writes_memory |= key->ge.part.gs.es->info.base.writes_memory;
NIR_PASS_V(nir, ac_nir_lower_ngg_gs, &options);
}