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aux/tc: flag late zs clears as partial clears

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this ensures drivers can't optimize out a zs attachment that gets
a late clear

Fixes: 07017aa137 ("util/tc: implement renderpass tracking")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21800>
This commit is contained in:
Mike Blumenkrantz 2023-03-08 12:13:05 -05:00 • committed by Marge Bot
parent 4c359f785f
commit 767ef6e02e
1 changed files with 7 additions and 2 deletions
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9
src/gallium/auxiliary/util/u_threaded_context.c
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@ -4379,8 +4379,13 @@ tc_clear(struct pipe_context *_pipe, unsigned buffers, const struct pipe_scissor
if (info) {
/* full clears use a different load operation, but are only valid if draws haven't occurred yet */
info->cbuf_clear |= (buffers >> 2) & ~info->cbuf_load;
if (buffers & PIPE_CLEAR_DEPTHSTENCIL && !info->zsbuf_load && !info->zsbuf_clear_partial)
info->zsbuf_clear = true;
if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
if (!info->zsbuf_load && !info->zsbuf_clear_partial)
info->zsbuf_clear = true;
else if (!info->zsbuf_clear)
/* this is a clear that occurred after a draw: flag as partial to ensure it isn't ignored */
info->zsbuf_clear_partial = true;
}
}
}
p->scissor_state_set = !!scissor_state;