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radv: adjust loop unrolling heuristics for int64

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In particular, increase the cost of 64-bit integer division.

Fixes huge shaders with dEQP-VK.spirv_assembly.type.scalar.i64.mod_geom
, with ACO used for GS this creates shaders requiring a branch with
>32767 dword offset.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Rhys Perry 2019-10-15 20:43:39 +01:00
parent 9817bff4da
commit 76544f632d
2 changed files with 16 additions and 7 deletions
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8
src/amd/compiler/aco_instruction_selection_setup.cpp
View file

@ -1337,13 +1337,7 @@ setup_isel_context(Program* program,
/* lower ALU operations */
// TODO: implement logic64 in aco, it's more effective for sgprs
nir_lower_int64(nir, (nir_lower_int64_options) (nir_lower_imul64 |
nir_lower_imul_high64 |
nir_lower_imul_2x32_64 |
nir_lower_divmod64 |
nir_lower_logic64 |
nir_lower_minmax64 |
nir_lower_iabs64));
nir_lower_int64(nir, nir->options->lower_int64_options);
nir_opt_idiv_const(nir, 32);
nir_lower_idiv(nir, nir_lower_idiv_precise);

15
src/amd/vulkan/radv_shader.c
View file

@ -81,6 +81,14 @@ static const struct nir_shader_compiler_options nir_options_llvm = {
.lower_rotate = true,
.max_unroll_iterations = 32,
.use_interpolated_input_intrinsics = true,
/* nir_lower_int64() isn't actually called for the LLVM backend, but
* this helps the loop unrolling heuristics. */
.lower_int64_options = nir_lower_imul64 |
nir_lower_imul_high64 |
nir_lower_imul_2x32_64 |
nir_lower_divmod64 |
nir_lower_minmax64 |
nir_lower_iabs64,
};
static const struct nir_shader_compiler_options nir_options_aco = {
@ -111,6 +119,13 @@ static const struct nir_shader_compiler_options nir_options_aco = {
.lower_rotate = true,
.max_unroll_iterations = 32,
.use_interpolated_input_intrinsics = true,
.lower_int64_options = nir_lower_imul64 |
nir_lower_imul_high64 |
nir_lower_imul_2x32_64 |
nir_lower_divmod64 |
nir_lower_logic64 |
nir_lower_minmax64 |
nir_lower_iabs64,
};
bool