From 75d7c752af7944154de412b2d5175e7e4e3fba1c Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 6 May 2021 14:06:05 +0200 Subject: [PATCH] radv: remove redundant call to radv_dcc_enabled() radv_layout_dcc_compressed() is now per level. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_meta_fast_clear.c | 13 ++++++------- src/amd/vulkan/radv_meta_resolve_cs.c | 4 +--- 2 files changed, 7 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index b7680036f40..74628aa4373 100644 --- a/src/amd/vulkan/radv_meta_fast_clear.c +++ b/src/amd/vulkan/radv_meta_fast_clear.c @@ -626,7 +626,7 @@ radv_process_color_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image * bool flush_cb = false; VkPipeline *pipeline; - if (decompress_dcc && radv_dcc_enabled(image, subresourceRange->baseMipLevel)) { + if (decompress_dcc) { pipeline = &device->meta_state.fast_clear_flush.dcc_decompress_pipeline; } else if (radv_image_has_fmask(image) && !image->tc_compatible_cmask) { pipeline = &device->meta_state.fast_clear_flush.fmask_decompress_pipeline; @@ -701,7 +701,7 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer, struct radv_image assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL); - if ((decompress_dcc && radv_dcc_enabled(image, subresourceRange->baseMipLevel)) || + if (decompress_dcc || (!(radv_image_has_fmask(image) && !image->tc_compatible_cmask) && image->fce_pred_offset)) { use_predication = true; } @@ -756,11 +756,9 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer, struct radv_image radv_update_fce_metadata(cmd_buffer, image, subresourceRange, false); } - if (radv_dcc_enabled(image, subresourceRange->baseMipLevel)) { - /* Mark the image as being decompressed. */ - if (decompress_dcc) - radv_update_dcc_metadata(cmd_buffer, image, subresourceRange, false); - } + /* Mark the image as being decompressed. */ + if (decompress_dcc) + radv_update_dcc_metadata(cmd_buffer, image, subresourceRange, false); } void @@ -784,6 +782,7 @@ static void radv_decompress_dcc_gfx(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image, const VkImageSubresourceRange *subresourceRange) { + assert(radv_dcc_enabled(image, subresourceRange->baseMipLevel)); radv_emit_color_decompress(cmd_buffer, image, subresourceRange, true); } diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index 2d1b86b841a..4f49410eb72 100644 --- a/src/amd/vulkan/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/radv_meta_resolve_cs.c @@ -678,8 +678,7 @@ radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_ uint32_t queue_mask = radv_image_queue_family_mask(dest_image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index); - if (radv_dcc_enabled(dest_image, region->dstSubresource.mipLevel) && - radv_layout_dcc_compressed(cmd_buffer->device, dest_image, region->dstSubresource.mipLevel, + if (radv_layout_dcc_compressed(cmd_buffer->device, dest_image, region->dstSubresource.mipLevel, dest_image_layout, false, queue_mask) && (region->dstOffset.x || region->dstOffset.y || region->dstOffset.z || region->extent.width != dest_image->info.width || @@ -761,7 +760,6 @@ radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_ radv_meta_restore(&saved_state, cmd_buffer); if (!radv_image_use_dcc_image_stores(cmd_buffer->device, dest_image) && - radv_dcc_enabled(dest_image, region->dstSubresource.mipLevel) && radv_layout_dcc_compressed(cmd_buffer->device, dest_image, region->dstSubresource.mipLevel, dest_image_layout, false, queue_mask)) {