From 758eb18c6f2ee4daf76c6ec730bd56c526d9d193 Mon Sep 17 00:00:00 2001 From: Caio Marcelo de Oliveira Filho Date: Tue, 23 Mar 2021 11:25:42 -0700 Subject: [PATCH] intel/compiler: Make vec4 generator take debug_enabled as a parameter The callers already have this value, and we would like to make it follow different rules other than stage that might not be visible to the helper function, so just pass explicitly. Reviewed-by: Kenneth Graunke Reviewed-by: Jordan Justen Part-of: --- src/intel/compiler/brw_shader.cpp | 2 +- src/intel/compiler/brw_vec4.cpp | 2 +- src/intel/compiler/brw_vec4.h | 3 ++- src/intel/compiler/brw_vec4_generator.cpp | 15 ++++++++------- src/intel/compiler/brw_vec4_gs_visitor.cpp | 4 ++-- src/intel/compiler/brw_vec4_tcs.cpp | 2 +- 6 files changed, 15 insertions(+), 13 deletions(-) diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index fd7372ad6c3..f8495df10be 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -1435,7 +1435,7 @@ brw_compile_tes(const struct brw_compiler *compiler, assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, &prog_data->base, v.cfg, v.performance_analysis.require(), - stats); + stats, debug_enabled); } return assembly; diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index 46621701b38..35637f81c25 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -2987,7 +2987,7 @@ brw_compile_vs(const struct brw_compiler *compiler, nir, &prog_data->base, v.cfg, v.performance_analysis.require(), - params->stats); + params->stats, debug_enabled); } return assembly; diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h index 833a60d3ea8..fa52cdc9566 100644 --- a/src/intel/compiler/brw_vec4.h +++ b/src/intel/compiler/brw_vec4.h @@ -49,7 +49,8 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler, struct brw_vue_prog_data *prog_data, const struct cfg_t *cfg, const brw::performance &perf, - struct brw_compile_stats *stats); + struct brw_compile_stats *stats, + bool debug_enabled); #ifdef __cplusplus } /* extern "C" */ diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp index a2e84397921..ab2d1191bef 100644 --- a/src/intel/compiler/brw_vec4_generator.cpp +++ b/src/intel/compiler/brw_vec4_generator.cpp @@ -1473,12 +1473,11 @@ generate_code(struct brw_codegen *p, struct brw_vue_prog_data *prog_data, const struct cfg_t *cfg, const performance &perf, - struct brw_compile_stats *stats) + struct brw_compile_stats *stats, + bool debug_enabled) { const struct gen_device_info *devinfo = p->devinfo; const char *stage_abbrev = _mesa_shader_stage_to_abbrev(nir->info.stage); - bool debug_flag = INTEL_DEBUG & - intel_debug_flag_for_shader_stage(nir->info.stage); struct disasm_info *disasm_info = disasm_initialize(devinfo, cfg); /* `send_count` explicitly does not include spills or fills, as we'd @@ -1493,7 +1492,7 @@ generate_code(struct brw_codegen *p, foreach_block_and_inst (block, vec4_instruction, inst, cfg) { struct brw_reg src[3], dst; - if (unlikely(debug_flag)) + if (unlikely(debug_enabled)) disasm_annotate(disasm_info, inst, p->next_insn_offset); for (unsigned int i = 0; i < 3; i++) { @@ -2180,7 +2179,7 @@ generate_code(struct brw_codegen *p, brw_compact_instructions(p, 0, disasm_info); int after_size = p->next_insn_offset; - if (unlikely(debug_flag)) { + if (unlikely(debug_enabled)) { unsigned char sha1[21]; char sha1buf[41]; @@ -2235,13 +2234,15 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler, struct brw_vue_prog_data *prog_data, const struct cfg_t *cfg, const performance &perf, - struct brw_compile_stats *stats) + struct brw_compile_stats *stats, + bool debug_enabled) { struct brw_codegen *p = rzalloc(mem_ctx, struct brw_codegen); brw_init_codegen(compiler->devinfo, p, mem_ctx); brw_set_default_access_mode(p, BRW_ALIGN_16); - generate_code(p, compiler, log_data, nir, prog_data, cfg, perf, stats); + generate_code(p, compiler, log_data, nir, prog_data, cfg, perf, stats, + debug_enabled); assert(prog_data->base.const_data_size == 0); if (nir->constant_data_size > 0) { diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp index 3aa0a3b5167..8454d84de61 100644 --- a/src/intel/compiler/brw_vec4_gs_visitor.cpp +++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp @@ -875,7 +875,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, nir, &prog_data->base, v.cfg, v.performance_analysis.require(), - stats); + stats, debug_enabled); } else { /* These variables could be modified by the execution of the GS * visitor if it packed the uniforms in the push constant buffer. @@ -940,7 +940,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, ret = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, &prog_data->base, gs->cfg, gs->performance_analysis.require(), - stats); + stats, debug_enabled); } delete gs; diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp index fcca3b82471..0053cd79775 100644 --- a/src/intel/compiler/brw_vec4_tcs.cpp +++ b/src/intel/compiler/brw_vec4_tcs.cpp @@ -500,7 +500,7 @@ brw_compile_tcs(const struct brw_compiler *compiler, assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, &prog_data->base, v.cfg, v.performance_analysis.require(), - stats); + stats, debug_enabled); } return assembly;