From 753c61f76da2fb516f9168d65528c434e6c6ba3a Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 17 Mar 2020 15:32:45 +0100 Subject: [PATCH] radv: fix random depth range unrestricted failures due to a cache issue The shader module name is used to compute the pipeline key. The driver used to load the wrong pipelines because the shader names were similar. This should fix random failures of dEQP-VK.pipeline.depth_range_unrestricted.* Fixes: f11ea226664 ("radv: fix a performance regression with graphics depth/stencil clears") Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Tested-by: Marge Bot Part-of: (cherry picked from commit 94e37859a96cc56cf0c5418a5af00a3e9f5a1bf5) --- .pick_status.json | 2 +- src/amd/vulkan/radv_meta_clear.c | 8 ++++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 2096fed1a45..272cd3882a2 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -4,7 +4,7 @@ "description": "radv: fix random depth range unrestricted failures due to a cache issue", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": "f11ea2266644a016a898744d1283d83ab63f4fb2" }, diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index 6a66665d06d..b9e4e81add5 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -512,8 +512,12 @@ build_depthstencil_shader(struct nir_shader **out_vs, nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL); nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL); - vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_depthstencil_vs"); - fs_b.shader->info.name = ralloc_strdup(fs_b.shader, "meta_clear_depthstencil_fs"); + vs_b.shader->info.name = ralloc_strdup(vs_b.shader, + unrestricted ? "meta_clear_depthstencil_unrestricted_vs" + : "meta_clear_depthstencil_vs"); + fs_b.shader->info.name = ralloc_strdup(fs_b.shader, + unrestricted ? "meta_clear_depthstencil_unrestricted_fs" + : "meta_clear_depthstencil_fs"); const struct glsl_type *position_out_type = glsl_vec4_type(); nir_variable *vs_out_pos =