From 74c467d9886cbb588d9e8f0ac23775d4b9d780bd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Tue, 20 Apr 2021 13:55:23 +0200 Subject: [PATCH] aco: Mark VCC clobbered for iadd8 and iadd16 reductions on GFX6-7. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On GFX6-7, the 8 and 16-bit integer add reductions use the 32-bit v_add instruction, which clobbers the VCC register. Cc: mesa-stable Signed-off-by: Timur Kristóf Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index d2ded4d858a..c30795f79fd 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -7506,6 +7506,8 @@ Temp emit_reduction_instr(isel_context *ctx, aco_opcode aco_op, ReduceOp op, bool clobber_vcc = false; if ((op == iadd32 || op == imul64) && ctx->program->chip_class < GFX9) clobber_vcc = true; + if ((op == iadd8 || op == iadd16) && ctx->program->chip_class < GFX8) + clobber_vcc = true; if (op == iadd64 || op == umin64 || op == umax64 || op == imin64 || op == imax64) clobber_vcc = true;