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intel/compiler/xe2: Update get_sampler_lowered_simd_width
The Bspec also says, "The table below describes the SIMD modes which
are supported. SIMD32 and SIMD64 are used for media-type operations
only." Perhaps this commit should just add
if (devinfo->ver >= 20)
return 16;
instead.
v2: Use reg_unit in get_sampler_lowered_simd_width. Suggested by Sagar.
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27305>
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parent
24a7f6cd16
commit
7441af803f
1 changed files with 15 additions and 8 deletions
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@ -4905,6 +4905,9 @@ get_fpu_lowered_simd_width(const fs_visitor *shader,
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* the message length to determine the exact SIMD width and argument count,
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* which makes a number of sampler message combinations impossible to
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* represent).
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*
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* Note: Platforms with monolithic SIMD16 double the possible SIMD widths
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* change from (SIMD8, SIMD16) to (SIMD16, SIMD32).
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*/
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static unsigned
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get_sampler_lowered_simd_width(const struct intel_device_info *devinfo,
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@ -4916,7 +4919,7 @@ get_sampler_lowered_simd_width(const struct intel_device_info *devinfo,
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*/
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if (inst->opcode != SHADER_OPCODE_TEX &&
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inst->components_read(TEX_LOGICAL_SRC_MIN_LOD))
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return 8;
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return devinfo->ver < 20 ? 8 : 16;
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/* Calculate the number of coordinate components that have to be present
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* assuming that additional arguments follow the texel coordinates in the
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@ -4953,12 +4956,14 @@ get_sampler_lowered_simd_width(const struct intel_device_info *devinfo,
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inst->components_read(TEX_LOGICAL_SRC_TG4_OFFSET) : 0) +
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inst->components_read(TEX_LOGICAL_SRC_MCS);
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/* SIMD16 messages with more than five arguments exceed the maximum message
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* size supported by the sampler, regardless of whether a header is
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* provided or not.
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const unsigned simd_limit = reg_unit(devinfo) *
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(num_payload_components > MAX_SAMPLER_MESSAGE_SIZE / 2 ? 8 : 16);
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/* SIMD16 (SIMD32 on Xe2) messages with more than five arguments exceed the
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* maximum message size supported by the sampler, regardless of whether a
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* header is provided or not.
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*/
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return MIN2(inst->exec_size,
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num_payload_components > MAX_SAMPLER_MESSAGE_SIZE / 2 ? 8 : 16);
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return MIN2(inst->exec_size, simd_limit);
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}
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/**
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@ -5169,8 +5174,10 @@ get_lowered_simd_width(const fs_visitor *shader, const fs_inst *inst)
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return MIN2(16, inst->exec_size);
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case SHADER_OPCODE_TXD_LOGICAL:
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/* TXD is unsupported in SIMD16 mode. */
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return 8;
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/* TXD is unsupported in SIMD16 mode previous to Xe2. SIMD32 is still
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* unsuppported on Xe2.
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*/
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return devinfo->ver < 20 ? 8 : 16;
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case SHADER_OPCODE_TXL_LOGICAL:
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case FS_OPCODE_TXB_LOGICAL:
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