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nvk: Move shader size and offset calculations to nvk_shader_get_shader_size
We are going to need the total shader size (without embedded data), let's move this out of the upload codepath. Signed-off-by: Mary Guillemard <mary@mary.zone> Reviewed-by: Mel Henning <mhenning@darkrefraction.com> Tested-by: Thomas H.P. Andersen <phomes@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40700>
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commit
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1 changed files with 47 additions and 14 deletions
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@ -540,23 +540,35 @@ nvk_compile_nir(struct nvk_device *dev, nir_shader *nir,
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return VK_SUCCESS;
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}
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static VkResult
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nvk_shader_upload(struct nvk_device *dev, struct nvk_shader *shader)
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static uint32_t
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nvk_shader_get_hdr_size(struct nvk_device *dev, struct nvk_shader *shader)
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{
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if (shader->info.stage == MESA_SHADER_COMPUTE)
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return 0;
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const struct nvk_physical_device *pdev = nvk_device_physical(dev);
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return pdev->info.cls_eng3d >= TURING_A ? TU102_SHADER_HEADER_SIZE
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: GF100_SHADER_HEADER_SIZE;
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}
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static uint32_t
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nvk_shader_get_shader_alignment(struct nvk_device *dev)
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{
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const struct nvk_physical_device *pdev = nvk_device_physical(dev);
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uint32_t hdr_size = 0;
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if (shader->info.stage != MESA_SHADER_COMPUTE) {
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if (pdev->info.cls_eng3d >= TURING_A)
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hdr_size = TU102_SHADER_HEADER_SIZE;
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else
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hdr_size = GF100_SHADER_HEADER_SIZE;
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}
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/* Fermi needs 0x40 alignment
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* Kepler+ needs the first instruction to be 0x80 aligned, so we waste 0x30 bytes
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*/
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int alignment = pdev->info.cls_eng3d >= KEPLER_A ? 0x80 : 0x40;
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return pdev->info.cls_eng3d >= KEPLER_A ? 0x80 : 0x40;
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}
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static uint32_t
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nvk_shader_get_shader_size(struct nvk_device *dev, struct nvk_shader *shader,
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uint32_t *out_hdr_offset, uint32_t *out_code_offset)
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{
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const struct nvk_physical_device *pdev = nvk_device_physical(dev);
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const uint32_t hdr_size = nvk_shader_get_hdr_size(dev, shader);
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const uint32_t alignment = nvk_shader_get_shader_alignment(dev);
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uint32_t total_size = 0;
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if (pdev->info.cls_eng3d >= KEPLER_A &&
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@ -568,13 +580,34 @@ nvk_shader_upload(struct nvk_device *dev, struct nvk_shader *shader)
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total_size = alignment - hdr_size;
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}
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const uint32_t hdr_offset = total_size;
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if (out_hdr_offset)
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*out_hdr_offset = total_size;
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total_size += hdr_size;
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const uint32_t code_offset = total_size;
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assert(code_offset % alignment == 0);
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if (out_code_offset) {
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*out_code_offset = total_size;
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assert(*out_code_offset % alignment == 0);
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}
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total_size += shader->code_size;
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return total_size;
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}
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static VkResult
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nvk_shader_upload(struct nvk_device *dev, struct nvk_shader *shader)
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{
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const struct nvk_physical_device *pdev = nvk_device_physical(dev);
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const uint32_t hdr_size = nvk_shader_get_hdr_size(dev, shader);
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uint32_t hdr_offset;
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uint32_t code_offset;
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uint32_t total_size = nvk_shader_get_shader_size(dev, shader, &hdr_offset,
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&code_offset);
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uint32_t alignment = nvk_shader_get_shader_alignment(dev);
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uint32_t data_offset = 0;
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if (shader->data_size > 0) {
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uint32_t cbuf_alignment = nvk_min_cbuf_alignment(&pdev->info);
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