fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-07 11:28:05 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 4

radeon: add support for new ttm

Browse source
This commit is contained in:
Jerome Glisse 2009-04-03 15:15:22 +02:00
parent 05304d41f2
commit 741aaaa288
4 changed files with 59 additions and 27 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
src/mesa/drivers/dri/r300/r300_cmdbuf.c
View file

@ -236,6 +236,24 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
OUT_BATCH_REGSEQ(R300_RB3D_COLORPITCH0, 1);
OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0);
END_BATCH();
if (r300->radeon.radeonScreen->driScreen->dri2.enabled) {
if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
BEGIN_BATCH_NO_AUTOSTATE(3);
OUT_BATCH_REGSEQ(R300_SC_SCISSORS_TL, 2);
OUT_BATCH(0);
OUT_BATCH((rrb->width << R300_SCISSORS_X_SHIFT) |
(rrb->height << R300_SCISSORS_Y_SHIFT));
END_BATCH();
} else {
BEGIN_BATCH_NO_AUTOSTATE(3);
OUT_BATCH_REGSEQ(R300_SC_SCISSORS_TL, 2);
OUT_BATCH((R300_SCISSORS_OFFSET << R300_SCISSORS_X_SHIFT) |
(R300_SCISSORS_OFFSET << R300_SCISSORS_Y_SHIFT));
OUT_BATCH(((rrb->width + R300_SCISSORS_OFFSET) << R300_SCISSORS_X_SHIFT) |
((rrb->height + R300_SCISSORS_OFFSET) << R300_SCISSORS_Y_SHIFT));
END_BATCH();
}
}
}
static void emit_zb_offset(GLcontext *ctx, struct radeon_state_atom * atom)

8
src/mesa/drivers/dri/radeon/radeon_common.c
View file

@ -377,9 +377,11 @@ void radeonWaitForIdleLocked(radeonContextPtr radeon)
static void radeonWaitForIdle(radeonContextPtr radeon)
{
LOCK_HARDWARE(radeon);
radeonWaitForIdleLocked(radeon);
UNLOCK_HARDWARE(radeon);
if (!radeon->radeonScreen->driScreen->dri2.enabled) {
LOCK_HARDWARE(radeon);
radeonWaitForIdleLocked(radeon);
UNLOCK_HARDWARE(radeon);
}
}
static void radeon_flip_renderbuffers(struct radeon_framebuffer *rfb)

48
src/mesa/drivers/dri/radeon/radeon_screen.c
View file

@ -246,15 +246,31 @@ extern const struct dri_extension mm_extensions[];
static int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo );
static int
radeonGetParam(int fd, int param, void *value)
radeonGetParam(__DRIscreenPrivate *sPriv, int param, void *value)
{
int ret;
drm_radeon_getparam_t gp;
struct drm_radeon_info info;
gp.param = param;
gp.value = value;
if (sPriv->drm_version.major >= 2) {
info.value = (uint64_t)value;
switch (param) {
case RADEON_PARAM_DEVICE_ID:
info.request = RADEON_INFO_DEVICE_ID;
break;
case RADEON_PARAM_NUM_GB_PIPES:
info.request = RADEON_INFO_NUM_GB_PIPES;
break;
default:
return -EINVAL;
}
ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info));
} else {
gp.param = param;
gp.value = value;
ret = drmCommandWriteRead( fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
}
return ret;
}
@ -767,8 +783,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
int ret;
#ifdef RADEON_PARAM_KERNEL_MM
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_KERNEL_MM,
&screen->kernel_mm);
ret = radeonGetParam(sPriv, RADEON_PARAM_KERNEL_MM, &screen->kernel_mm);
if (ret && ret != -EINVAL) {
FREE( screen );
@ -780,7 +795,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
screen->kernel_mm = 0;
#endif
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_GART_BUFFER_OFFSET,
ret = radeonGetParam(sPriv, RADEON_PARAM_GART_BUFFER_OFFSET,
&screen->gart_buffer_offset);
if (ret) {
@ -789,7 +804,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
return NULL;
}
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_GART_BASE,
ret = radeonGetParam(sPriv, RADEON_PARAM_GART_BASE,
&screen->gart_base);
if (ret) {
FREE( screen );
@ -797,7 +812,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
return NULL;
}
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_IRQ_NR,
ret = radeonGetParam(sPriv, RADEON_PARAM_IRQ_NR,
&screen->irq);
if (ret) {
FREE( screen );
@ -898,8 +913,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
screen->cpp = dri_priv->bpp / 8;
screen->AGPMode = dri_priv->AGPMode;
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_FB_LOCATION,
&temp);
ret = radeonGetParam(sPriv, RADEON_PARAM_FB_LOCATION, &temp);
if (ret) {
if (screen->chip_family < CHIP_FAMILY_RS600 && !screen->kernel_mm)
screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff) << 16;
@ -913,8 +927,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
}
if (screen->chip_family >= CHIP_FAMILY_R300) {
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_NUM_GB_PIPES,
&temp);
ret = radeonGetParam(sPriv, RADEON_PARAM_NUM_GB_PIPES, &temp);
if (ret) {
fprintf(stderr, "Unable to get num_pipes, need newer drm\n");
switch (screen->chip_family) {
@ -1069,11 +1082,9 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv)
screen->kernel_mm = 1;
screen->chip_flags = 0;
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_IRQ_NR,
&screen->irq);
ret = radeonGetParam(sPriv, RADEON_PARAM_IRQ_NR, &screen->irq);
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_DEVICE_ID,
&device_id);
ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
if (ret) {
FREE( screen );
fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
@ -1085,8 +1096,7 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv)
return NULL;
if (screen->chip_family >= CHIP_FAMILY_R300) {
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_NUM_GB_PIPES,
&temp);
ret = radeonGetParam(sPriv, RADEON_PARAM_NUM_GB_PIPES, &temp);
if (ret) {
fprintf(stderr, "Unable to get num_pipes, need newer drm\n");
switch (screen->chip_family) {

12
src/mesa/drivers/dri/radeon/radeon_span.c
View file

@ -503,9 +503,10 @@ static void radeonSpanRenderStart(GLcontext * ctx)
* unnecessary due to the fact that mapping our buffers, textures, etc.
* should implicitly wait for any previous rendering commands that must
* be waited on. */
LOCK_HARDWARE(rmesa);
radeonWaitForIdleLocked(rmesa);
if (!rmesa->radeonScreen->driScreen->dri2.enabled) {
LOCK_HARDWARE(rmesa);
radeonWaitForIdleLocked(rmesa);
}
for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
if (ctx->Texture.Unit[i]._ReallyEnabled)
ctx->Driver.MapTexture(ctx, ctx->Texture.Unit[i]._Current);
@ -522,8 +523,9 @@ static void radeonSpanRenderFinish(GLcontext * ctx)
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
int i;
_swrast_flush(ctx);
UNLOCK_HARDWARE(rmesa);
if (!rmesa->radeonScreen->driScreen->dri2.enabled) {
UNLOCK_HARDWARE(rmesa);
}
for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
if (ctx->Texture.Unit[i]._ReallyEnabled)
ctx->Driver.UnmapTexture(ctx, ctx->Texture.Unit[i]._Current);