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radeonsi: set glsl_bindless_handles_are_32bit

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to lower bindless handles to 32 bits in the GLSL compiler and eliminate
input loads of high 32 bits of bindless handles before nir_opt_varyings.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41170>
This commit is contained in:
Marek Olšák 2026-04-21 14:54:46 -04:00 • committed by Marge Bot
parent 5db0493a04
commit 740b9fa19b
2 changed files with 4 additions and 5 deletions
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1
src/gallium/drivers/radeonsi/si_get.c
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@ -587,6 +587,7 @@ void si_init_screen_caps(struct si_screen *sscreen)
caps->cl_gl_sharing = true;
caps->call_finalize_nir_in_linker = true;
caps->blit_3d = true;
caps->glsl_bindless_handles_are_32bit = true;
/* Fixup dmabuf caps for the virtio + vpipe case (when fd=-1, u_init_pipe_screen_caps
* fails to set this capability). */

8
src/gallium/drivers/radeonsi/si_nir_lower_resource.c
View file

@ -379,8 +379,7 @@ static bool lower_resource_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin
intrin->intrinsic == nir_intrinsic_bindless_image_fragment_mask_load_amd ||
intrin->intrinsic == nir_intrinsic_bindless_image_descriptor_amd;
nir_def *index = nir_u2u32(b, intrin->src[0].ssa);
nir_def *index = intrin->src[0].ssa;
nir_def *desc = load_bindless_image_desc(b, index, desc_type, is_load, s);
if (intrin->intrinsic == nir_intrinsic_bindless_image_descriptor_amd) {
@ -524,12 +523,11 @@ static bool lower_resource_tex(nir_builder *b, nir_tex_instr *tex,
}
break;
case nir_tex_src_texture_handle:
/* We use 32-bit handles. */
texture_handle = nir_u2u32(b, tex->src[i].src.ssa);
texture_handle = tex->src[i].src.ssa;
break;
case nir_tex_src_sampler_handle:
if (has_sampler) {
sampler_handle = nir_u2u32(b, tex->src[i].src.ssa);
sampler_handle = tex->src[i].src.ssa;
} else {
nir_tex_instr_remove_src(tex, i);
i--;