From 73ff415b596ea0449bd79b2a076987678fcefebd Mon Sep 17 00:00:00 2001 From: Paul Berry Date: Mon, 9 Jan 2012 15:36:27 -0800 Subject: [PATCH] i965: Set pitch of pull constant buffers to 16. We always access pull constant buffers using the message types "OWord Block Read" or "OWord Dual Block Read". According to the Sandy Bridge PRM, Vol 4 Part 1, pages 214 and 218, when using these messages: "the surface pitch is ignored, the surface is treated as a 1-dimensional surface. An element size (pitch) of 16 bytes is used to determine the size of the buffer for out-of-bounds checking if using the surface state model." Previously we were setting the pitch for pull constant buffers to the size of the whole constant buffer--this made no sense and would have led to incorrect behavior if it were not for the fact that the pitch is ignored. For clarity, this patch sets the pitch for pull constant buffers to 16 bytes, consistent with the hardware's behavior. v2: Clarify the meaning of the ignored values by writing them as (16 - 1). Reviewed-by: Eric Anholt Reviewed-by: Kenneth Graunke (cherry picked from commit fcd5af4a916b4ba7860ba27eb47404934bde0d08) --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 62214d1f9e7..7fd83ea984c 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -703,7 +703,7 @@ brw_create_constant_surface(struct brw_context *brw, ((w >> 7) & 0x1fff) << BRW_SURFACE_HEIGHT_SHIFT); surf[3] = (((w >> 20) & 0x7f) << BRW_SURFACE_DEPTH_SHIFT | - (width * 16 - 1) << BRW_SURFACE_PITCH_SHIFT); + (16 - 1) << BRW_SURFACE_PITCH_SHIFT); /* ignored */ surf[4] = 0; surf[5] = 0; diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index adc3a45e12f..d429adcfd60 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -157,7 +157,7 @@ gen7_create_constant_surface(struct brw_context *brw, surf->ss2.width = w & 0x7f; /* bits 6:0 of size or width */ surf->ss2.height = (w >> 7) & 0x1fff; /* bits 19:7 of size or width */ surf->ss3.depth = (w >> 20) & 0x7f; /* bits 26:20 of size or width */ - surf->ss3.pitch = (width * 16) - 1; /* ignored?? */ + surf->ss3.pitch = (16 - 1); /* ignored */ gen7_set_surface_tiling(surf, I915_TILING_NONE); /* tiling now allowed */ /* Emit relocation to surface contents. Section 5.1.1 of the gen4