diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 7ddf5ee11c3..2ad4d83de7e 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -6046,7 +6046,7 @@ lookup_ps_epilog(struct radv_cmd_buffer *cmd_buffer) const uint32_t dst_blend = G_028780_COLOR_DESTBLEND(cb_blend_control); state.color_attachment_formats[i] = render->color_att[i].format; - state.color_blend_enable |= d->vk.cb.attachments[i].blend_enable << (4 * i); + state.color_blend_enable |= d->vk.cb.attachments[i].blend_enable << i; if (src_blend == V_028780_BLEND_SRC_ALPHA || src_blend == V_028780_BLEND_ONE_MINUS_SRC_ALPHA || src_blend == V_028780_BLEND_SRC_ALPHA_SATURATE || dst_blend == V_028780_BLEND_SRC_ALPHA || diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 53445f1f5a1..c503159a3fd 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -1780,7 +1780,7 @@ radv_generate_ps_epilog_key(const struct radv_device *device, const struct radv_ cb_idx == MESA_VK_ATTACHMENT_UNUSED) { cf = V_028714_SPI_SHADER_ZERO; } else { - bool blend_enable = state->color_blend_enable & (0xfu << (i * 4)); + const bool blend_enable = (state->color_blend_enable >> i) & 0x1u; cf = radv_choose_spi_color_format(device, fmt, blend_enable, state->need_src_alpha & (1 << i)); @@ -1855,10 +1855,9 @@ radv_pipeline_generate_ps_epilog_key(const struct radv_device *device, const str if (!((ps_epilog.color_write_mask >> (i * 4)) & 0xf)) continue; - if (state->cb->attachments[i].blend_enable) - ps_epilog.color_blend_enable |= 0xfu << (i * 4); + ps_epilog.color_blend_enable |= state->cb->attachments[i].blend_enable << i; - if (!((ps_epilog.color_blend_enable >> (i * 4)) & 0xf)) + if (!((ps_epilog.color_blend_enable >> i) & 0x1u)) continue; if (i == 0 && radv_can_enable_dual_src(&state->cb->attachments[i])) { diff --git a/src/amd/vulkan/radv_pipeline_graphics.h b/src/amd/vulkan/radv_pipeline_graphics.h index a2f281e6050..39b794a3341 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.h +++ b/src/amd/vulkan/radv_pipeline_graphics.h @@ -612,7 +612,7 @@ struct radv_ps_epilog_state { uint8_t color_attachment_mappings[MAX_RTS]; uint32_t color_write_mask; - uint32_t color_blend_enable; + uint8_t color_blend_enable; uint32_t colors_written; bool mrt0_is_dual_src;